• Title/Summary/Keyword: Single-Pass Algorithm

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Ground Altitude Computation Algorithm using Laser Altimeter and GPS for UAV Automatic Take-off and Landing (레이저 고도계 및 GPS를 이용한 무인기의 자동이착륙용 지면고도계산 알고리듬 설계)

  • Cho, Sangook;Choi, Keeyoung;Kim, Sung-Su
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.41 no.1
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    • pp.54-60
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    • 2013
  • This paper presents a ground altitude determination algorithm using a laser altimeter and GPS for automatic take-off and landing of UAV. The characteristics of the laser altimeter was analyzed in ground tests and a low-pass filter was designed to reduce the effect of signal interruption due to reflectivity problem. The paper shows that a single sensor cannot measure ground altitude appropriately in terms of reliability and accuracy. To complement shortcomings of the laser altimeter, the linear Kalman filter was designed using DGPS vertical speed. Designed filter was validated and tuned through the steps of simulation, ground test and flight test. It was confirmed that the accuracy for automatic landing is achievable.

An Efficient Approach for Single-Pass Mining of Web Traversal Sequences (단일 스캔을 통한 웹 방문 패턴의 탐색 기법)

  • Kim, Nak-Min;Jeong, Byeong-Soo;Ahmed, Chowdhury Farhan
    • Journal of KIISE:Databases
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    • v.37 no.5
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    • pp.221-227
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    • 2010
  • Web access sequence mining can discover the frequently accessed web pages pursued by users. Utility-based web access sequence mining handles non-binary occurrences of web pages and extracts more useful knowledge from web logs. However, the existing utility-based web access sequence mining approach considers web access sequences from the very beginning of web logs and therefore it is not suitable for mining data streams where the volume of data is huge and unbounded. At the same time, it cannot find the recent change of knowledge in data streams adaptively. The existing approach has many other limitations such as considering only forward references of web access sequences, suffers in the level-wise candidate generation-and-test methodology, needs several database scans, etc. In this paper, we propose a new approach for high utility web access sequence mining over data streams with a sliding window method. Our approach can not only handle large-scale data but also efficiently discover the recently generated information from data streams. Moreover, it can solve the other limitations of the existing algorithm over data streams. Extensive performance analyses show that our approach is very efficient and outperforms the existing algorithm.

Measurement of 18GHz Radio Propagation Characteristics in Subway Tunnel for Train-Wayside Multimedia Transmission (지하철 터널에서의 18GHz 무선영상신호 전파특성 측정)

  • Choi, Kyu-Hyoung;Seo, Myung-Sik
    • Journal of the Korean Society for Railway
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    • v.15 no.4
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    • pp.364-369
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    • 2012
  • This paper presents an experimental study on the radio propagation characteristics in subway tunnel at 18GHz frequency band which has been assigned to video transmission between train and wayside. The radio propagation tests are carried out in the subway tunnel of Seoul Metro using the antenna and communication devices of the prototype video transmission system. The measurement results show that 18GHz radio propagation in subway tunnel has smaller path loss than that of general outdoor radio environment. It is also cleared that the arch-type tunnels have smaller radio propagation losses than rectangular tunnels, and single track tunnels have smaller pass loss than double track tunnels. From the measurements, the radio propagation coverage is worked out as 520 meters. The curved tunnels which cannot have LOS communication between transmitter and receiver have large pass losses and fluctuation profile along distance. The radio propagation coverage along curved tunnels is worked out as 300 meters. These investigation results can be used to design the 18GHz radio transmission system for subway tunnel by providing the optimized wayside transmitter locations and handover algorithm customized to the radio propagation characteristics in subway tunnels.

An Implementation of Low Power MAC using Improvement of Multiply/Subtract Operation Method and PTL Circuit Design Methodology (승/감산 연산방법의 개선 및 PTL회로설계 기법을 이용한 저전력 MAC의 구현)

  • Sim, Gi-Hak;O, Ik-Gyun;Hong, Sang-Min;Yu, Beom-Seon;Lee, Gi-Yeong;Jo, Tae-Won
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.4
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    • pp.60-70
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    • 2000
  • An 8$\times$8+20-bit MAC is designed with low power design methodologies at each of the system design levels. At algorithm level, a new method for multipl $y_tract operation is proposed, and it saves the transistor counts over conventional methods in hardware realization. A new Booth selector circuit using NMOS pass-transistor logic is also proposed at circuit level. It is superior to other circuits designed by CMOS in power-delay-product. And at architecture level, we adopted an ELM adder that is known to be the most efficient in power consumption, operating frequency, area and design regularity as the final adder. For registers, dynamic CMOS single-edge triggered flip-flops are used because they need less transistors per bit. To increase the operating frequency 2-stage pipeline architecture is adopted, and fast 4:2 compressors are applied in Wallace tree block. As a simulation result, the designed MAC in 0.6${\mu}{\textrm}{m}$ 1-poly 3-metal CMOS process is operated at 200MHz, 3.3V and consumed 35㎽ of power in multiply operation, and operated at 100MHz consuming 29㎽ in MAC operations, respectively.ly.

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A Study on the Parallel Multiplier over $GF(3^m)$ Using AOTP (AOTP를 적용한 $GF(3^m)$ 상의 병렬승산기 설계에 관한 연구)

  • Han, Sung-Il;Hwang, Jong-Hak
    • Journal of IKEEE
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    • v.8 no.2 s.15
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    • pp.172-180
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    • 2004
  • In this paper, a parallel Input/Output modulo multiplier, which is applied to AOTP(All One or Two Polynomials) multiplicative algorithm over $GF(3^m)$, has been proposed using neuron-MOS Down-literal circuit on voltage mode. The three-valued input of the proposed multiplier is modulated by using neuron-MOS Down-literal circuit and the multiplication and Addition gates are implemented by the selecting of the three-valued input signals transformed by the module. The proposed circuits are simulated with the electrical parameter of a standard $0.35{\mu}m$CMOS N-well doubly-poly four-metal technology and a single +3V supply voltage. In the simulation result, the multiplier shows 4 uW power consumption and 3 MHzsampling rate and maintains output voltage level in ${\pm}0.1V$.

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A Design of Two-stage Cascaded Polyphase FIR Filters for the Sample Rate Converter (표본화 속도 변환기용 2단 직렬형 다상 FIR 필터의 설계)

  • Baek Je-In;Kim Jin-Up
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.8C
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    • pp.806-815
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    • 2006
  • It is studied to design a low pass filter of the SRC(sample rate converter), which is used to change the sampling rate of digital signals such as in digital modulation and demodulation systems. The larger the conversion ratio of the sample rate becomes, the more signal processing is needed for the filter, which corresponds to the more complexity in circuit realization. Thus it is important to reduce the amount of signal processing for the case of high conversion ratio. In this paper it is presented a design method of a two-stage cascaded FIR filter, which proved to have reduced amount of signal processing in comparison with a conventional single-stage one. The reduction effect of signal processing turned out to be more noticeable for larger value of conversion ratio, for instance, giving down to 72% in complexity for the conversion ratio of 32. It has been shown that the reduction effect is dependent to specific combination of conversion ratios of the cascaded filters. So an exhaustive search has been performed in order to obtain the optimal combination for various values of the total conversion ratio. In this paper every filter is considered to be implemented in the form of a polyphase FIR filter, and its coefficients are determined by use of the Parks-McCllelan algorithm.

A Study on LED Energy Efficiency in Buildings through Cloud-based User Authentication in IoT Network Environment (IoT 네트워크 환경에서 클라우드 기반의 사용자 인증을 통한 건물 내의 LED에너지 효율화 연구)

  • Ahn, Ye-Chan;Lee, Keun-Ho
    • Journal of Digital Convergence
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    • v.15 no.5
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    • pp.235-240
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    • 2017
  • Recently, Internet of things have been applied to various fields and are becoming common in our everyday life. Everything in our daily lives is networked, interacting with each other and giving us more useful effects. In this paper, we implemented an algorithm that can illuminate the LED lighting to the authorized person 's place in the network environment connected with the authentication device only once with the user authentication. User authentication in one building User authenticated through a single user search for the location of the user's lab stored in the database using the certified information and LED lights up to the lab where the user works. Through this, unnecessary energy is generated because people do not pass frequently.