• Journal of Power Electronics
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• 제11권4호
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• pp.507-511
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• 2011

This paper presents a single-switch buck converter with a ripple-free inductor current. In the proposed converter, the filter inductor current ripple is completely removed by utilizing an auxiliary circuit consisting of an additional winding of the filter inductor, an auxiliary inductor, and an auxiliary capacitor. Moreover, the ripple-free current characteristic is maintained under both light load and full load conditions. The theoretical analysis and performance of the proposed converter were verified with a 110W experimental prototype operating at a 107 kHz switching frequency.

• Journal of Power Electronics
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• 제12권5호
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• pp.699-707
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• 2012

This paper proposes a single-stage half-bridge electronic ballast with a high power factor using only a single coupled inductor. Compared to conventional high power factor electronic ballasts, the proposed ballast is a simpler circuit with a low cost and a high reliability. The proposed ballast is made up of a power-factor-correction (PFC) circuit and a self-oscillating class-D inverter. The PFC and inverter stages of the proposed ballast are simplified by sharing only a single coupled inductor and two common switches. The proposed PFC circuit can achieve a high power factor and low voltage stresses of the switches. A saturable transformer in the self-oscillating class-D inverter determines the switching frequency of the ballast. Experimental results obtained on a 30W fluorescent lamp are discussed.

• 전력전자학회논문지
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• 제25권5호
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• pp.343-349
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• 2020

This study proposes a new single inductor converter for DC grid systems. A conventional system is composed of two independent converters for controlling battery and load. This system is simple but it has two inductors that affect power density and efficiency. The proposed converter can reduce the number of inductors by integrating the two converters and relieve voltage stress on switches by using a battery switching cell. Accordingly, power density and efficiency can be improved using a single inductor and lower voltage-rated switches. A prototype of a 500 W converter is built, and each mode is experimented on to confirm the validity of the proposed converter.

• 전력전자학회논문지
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• 제13권4호
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• pp.263-269
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• 2008

본 연구에서는 연속도통모드에서 단일 공진 인덕터를 사용하여 ZVT를 갖는 interleaved 부스트 컨버터를 제안한다. ZVT셀을 가지는 제안된 ZVT가지는 Interleaved 부스트 컨버터는 간단한 회로를 가지며 필터 사이즈 감소와 저 비용이 가능하다는 장점을 가진다. 또한 고 전력 응용에 적합하다. 본 논문에서 제안된 ZVT 가지는 IBC의 회로와 동작 원리를 자세히 설명하였다. 그리고 제안된 ZVT 기법의 타당성은 실험을 통하여 검증하였다.

• IEIE Transactions on Smart Processing and Computing
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• 제4권1호
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• pp.44-50
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• 2015

This paper presents a high speed synchronous single inductor dual output boost converter using Type-III compensation for power management in smart devices. Maintaining multiple outputs from a single inductor is becoming very important because of inductor the sizes. The uses of high switching frequency, inductor and capacitor sizes are reduced. Owing to synchronous rectification this kind of converter is suitable for SoC. The phase is controlled in time sharing manner for each output. The controller used here is Type-III, which ensures quick settling time and high stability. The outputs are stable within $58{\mu}s$. The simulation results show that the proposed scheme achieves a better overall performance. The input voltage is 1.8V, switching frequency is 5MHz, and the inductor used is 600nH. The output voltages and powers are 2.6V& 3.3V and 147mW &, 230mW respectively.

• Journal of Power Electronics
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• 제13권4호
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• pp.636-646
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• 2013

A single-phase tapped-inductor boost converter has been proposed previously. However, detailed characterization and performance analysis were not conducted. This paper presents a detailed characterization, performance analysis, and design expressions of a single-phase tapped-coupled-inductor boost converter. Expressions are derived for average and RMS input current as well as for RMS input and output capacitor current ripple. A systematic approach for sizing the tapped-coupled inductor, active switch, and output diode is presented; such approach has not been reported in related literature. This study reveals that sizing of the inductor has to be based on current ripple requirement, turns ratio, and load. Conditions that produce discontinuous inductor current are also discussed. Analysis of a non-ideal converter operating in continuous conduction mode is also conducted. The expression for the voltage ratio considering the coupling coefficient is derived. The suitability of the converter for high-voltage step-up applications is evaluated. Factors that affect the voltage boost ratio are also identified. The effects of duty ratio and load variation on the performance of the converter are also investigated. The theoretically derived characteristics are validated through simulations. Experimental results obtained at a low power level are included to validate the analytical and simulation results. A good agreement is observed among the analytical, simulation, and experimental results.

• Journal of Power Electronics
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• 제13권2호
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• pp.206-213
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• 2013

In this paper, an improved passive snubber is investigated in a single-phase single-stage full-bridge boost power factor correction (PFC) converter, by which the voltage spike across primary side of the power transformer can be suppressed and the absorbed energy can be transferred to the output side. When compared with the basic passive snubber, the two single-inductors are replaced by a coupled-inductor in the improved snubber. As a result, synchronous resonances in the snubber can be achieved, which can avoid the unbalance of the voltage and current in the snubber. The operational principle of the improved passive snubber is analyzed in detail based on a single-phase PFC converter, and the design considerations of both the snubber and the coupled-inductor are given. Finally, a laboratory-made prototype is built, and the experimental results verify the feasibility of the proposed method and the validity of the theoretical analysis and design method.

• Journal of Power Electronics
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• 제15권2호
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• pp.309-318
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• 2015

This study proposes a dual-output single-stage bridgeless single-ended primary-inductor converter (DOSSBS) that can completely remove the front-end full-bridge alternating current-direct current rectifier to accomplish power factor correction for universal line input. Without the need for bridge diodes, the proposed converter has the advantages of low component count and simple structure, and can thus significantly reduce power loss. DOSSBS has two uncommon output ports to provide different voltage levels to loads, instead of using two separate power factor correctors or multi-stage configurations in a single stage. Therefore, this proposed converter is cost-effective and compact. A magnetically coupled inductor is introduced in DOSSBS to replace two separate inductors to decrease volume and cost. Energy stored in the leakage inductance of the coupled inductor can be completely recycled. In each line cycle, the two active switches in DOSSBS are operated in either high-frequency pulse-width modulation pattern or low-frequency rectifying mode for switching loss reduction. A prototype for dealing with an $85-265V_{rms}$ universal line is designed, analyzed, and built. Practical measurements demonstrate the feasibility and functionality of the proposed converter.

• Journal of Power Electronics
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• 제15권2호
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• pp.327-337
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• 2015

This study discusses the design of a parallel-operated DC-DC single-ended primary-inductor converter (SEPIC) for low-voltage application and current sharing with a constant output voltage. A coupled inductor is used for parallel-connected SEPIC topology. Generally, two separate inductors require different ripple currents, but a coupled inductor has the advantage of using the same ripple current. Furthermore, tightly coupled inductors require only half of the ripple current that separate inductors use. In this proposed work, tightly coupled inductors are used. These produce an output that is more efficient than that from separate inductors. Two SEPICs are also connected in parallel using the coupled inductors with a single common controller. An analog control circuit is designed to generate pulse width modulation (PWM) signals and to fulfill the closed-loop control function. A stable output current-sharing strategy is proposed in this system. An experimental setup is developed for a 18.5 V, 60 W parallel SEPIC (PSEPIC) converter, and the results are verified. Results indicate that the PSEPIC provides good response for the variation of input voltage and sudden change in load.

• 한국정보전자통신기술학회논문지
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• 제13권5호
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• pp.353-358
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• 2020

일반적인 나선형 인덕터의 경우에 비대칭 구조를 가짐에 따라 포트의 방향에 영향을 받게 된다. 본 논문에서는 단층이면서 대칭 구조를 가질 수 있는 나선형 인덕터를 제안하고 시뮬레이션 및 주파수 특성을 분석하였다. 일반적인 나선형 인덕터는 포트의 기준에 따라 주파수-인덕턴스 특성, 주파수-품질계수 특성, 자기공진주파수가 큰 차이를 보이는 반면에, 제안된 대칭 나선형 인덕터는 포트에 변함없이 2.7nH의 인덕턴스, 약 7.86의 품질계수, 약 14.1GHz의 자기공진주파수를 가진다. 이는 기존 일반적인 나선형 인덕터가 포트에 따라 큰 차이를 갖는 것과 비교하여 포트의 방향에 대한 영향이 적은 것을 확인할 수 있었다. 다만, 코일의 점유 면적에 비하여 상호 인덕턴스가 줄어들어 낮은 인덕턴스를 가지며, 인덕턴스 증가보다 코일의 저항이 더 증가하여 품질계수 또한 낮아짐을 확인할 수 있었다. 향후에는 2층 대칭 나선형 구조를 통하여 인덕턴스와 품질계수를 향상시킬 수 있을 것으로 기대된다.