• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.1020-1022
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• 2001

because the output of solar cell is direct, it is necessary to install D/A converter system for A.C load, and in case of driving utility line system, it is possible to drive system relation when the system supplies sinusodal current ant voltage having unit power factor. As the characteristics of the soar cell output the is influenced by dailysunight charge, for more electric power it is essential to control the direction toward the san so that the driving point of solar cell can always operate near maximum output point. PWM modulation device among electric power converters must have stable modulation at anytime when it includes noise-factors such as noise-wave and noises on electric voltage wave, a synchronous signal system. In dealing with synchronous signal for control and control signal by microprocessor, it is necessary to compensate it because there is time difference between sample paint and carrier wave. On this papers, single phase PWM current type invertor controled the solar cell having typical voltage dropping character has optimun short current in short, reduces D.C reactance, composes controller for modulation and keeps lower harmonic and high power factor keeping maximum output of solar cell according daily sunlight charge variation.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.6
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• pp.670-680
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• 2010

A low power single-chip CMOS receiver for 60 GHz mobile application are proposed in this paper. The single-chip receiver consists of a 4-stage current re-use LNA with under 4 dB NF, Cgs compensating resistive mixer with -9.4 dB conversion gain, Ka-band low phase noise VCO with -113 dBc/Hz phase noise at 1 MHz offset from 26.89 GHz, high-suppression frequency doubler with -0.45 dB conversion gain, and 2-stage current re-use drive amplifier. The size of the fabricated receiver using a standard 0.13 ${\mu}m$ CMOS technology is 2.67 mm$\times$0.75 mm including probing pads. An RF bandwidth is 6.2 GHz, from 55 to 61.2 GHz and an LO tuning range is 7.14 GHz, from 48.45 GHz to 55.59 GHz. The If bandwidth is 5.25 GHz(4.75~10 GHz) The conversion gain and input P1 dB are -9.5 dB and -12.5 dBm, respectively, at RF frequency of 59 GHz. The proposed single-chip receiver describes very good noise performances and linearity with very low DC power consumption of only 21.9 mW.