• The Transactions of the Korean Institute of Power Electronics
• /
• v.27 no.6
• /
• pp.526-534
• /
• 2022

The modular multilevel converter (MMC) has been widely applied to various industrial areas because of its various advantages and structural characteristics. Therefore, many methods for synthesizing the output voltage of MMC have been studied. Among these methods, phase-shifted pulse width modulation (PSPWM) is frequently used in MMC systems because it has diverse merits, such as excellent output qualities even with a small number of cells and uniform power distribution among cells. In this study, the total harmonic distortion (THD) of the output voltage is analyzed in accordance with the number of cells in one arm of a single-delta bridge cell MMC in order to compare PSPWM methods in terms of the THD of the output voltage. The physical characteristics of the triangle and sawtooth carrier waves used for the PSPWM and the mathematical modeling of output voltage are introduced. Then, the obtained results are verified through real-time simulation of a 1 MW single-delta bridge cell MMC system.

• Journal of Electrical Engineering and Technology
• /
• v.13 no.1
• /
• pp.270-279
• /
• 2018

This paper elucidates a hysteresis current controller for enhancing the performance of static synchronous compensator (STATCOM) using cascaded H-bridge multilevel inverter. Due to the rising power demand and growing conventional generation costs a new alternative in renewable energy source is gaining popularity and recognition. A five level single phase cascaded multilevel inverter with two separated dc sources, which is energized by photovoltaic - wind hybrid energy source. The voltages across the each dc source is balanced and standardized by the proposed hysteresis current controller. The performance of STATCOM is analyzed by connecting with grid connected system, under the steady state & dynamic state. To reduce the Total Harmonic Distortion (THD) and to improve the output voltage, closed loop hysteresis current control is achieved using PLL and PI controller. The performance of the proposed system is scrutinized through various simulation results using matlab/simulink and hardware results are also verified with simulation results.

• Journal of Electrical Engineering and Technology
• /
• v.12 no.6
• /
• pp.2278-2288
• /
• 2017

Multilevel converter topologies are widely used in many applications. The cascaded H-bridge multilevel inverter (CHBMI), which is one of many multilevel converter topologies, has been introduced as a useful topology in high and medium power. However, it has a drawback to require a lot of switches. Therefore, the reliability of CHBMI is important factor for analyzing the performance. This paper presents a simple switch fault diagnosis method for single-phase CHBMI. There are two types of switch faults: open-fault and short-fault. In the open-fault, the body diode of faulty switch provides a freewheeling current path. However, when the short-fault occurs, the distortion of output current is different from that of the open-fault because it has an unavailable freewheeling current flow path due to a disconnection of fuse. The fault diagnosis method is based on the zero current time analysis according to zero-voltage switching states. Using the proposed method, it is possible to detect the location of faulty switch accurately. The PSIM simulation and experimental results show the effectiveness of proposed switch fault diagnosis method.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.9 no.6
• /
• pp.620-627
• /
• 2004

As h-bridge multilevel inverter is connected with series of single phase power cell, so it obtain high voltage using low voltage power semi-conductor and output voltage similar to sine wave. In this topology, the number of power cell increases in proportion to the output voltage level. Therefore, there are drawbacks that are responsibility against operating ability of main controller and signal wire increase. However, we can overcome this problems by the substitution of serial communication for the PWM signal in power cell control. Additionally, it has merits of reliability and maintenance. This paper deals with the synchronization and phase-shift method of power cell PWM using CAN(Controller Area Network) communication interrupt in H-bridge multilevel inverter. The advantages of proposed method are signal-line simplification using serial communication between main controller and cell controller, burden reduction in main controller, modularization of power cell, easy protection of each power cell, expandability improvement and reliability increase of control signal and power cell. This paper establishes propriety and reliability of proposed method through experiment of 13-level H-bridge multilevel inverter.

• Journal of Electrical Engineering and Technology
• /
• v.7 no.4
• /
• pp.538-545
• /
• 2012

In this paper a novel cascaded transformer multilevel inverter is proposed. Each basic unit of the inverter includes two DC sources, single phase transformers and semiconductor switches. This inverter, which operates as symmetric and asymmetric, can output more number of voltage levels in the same number of the switching devices. Besides, the number of gate driving circuits is reduced, which leads to circuit size reduction and lower power consumption in the driving circuits. Moreover, several methods to determination of transformers turn ratio in proposed inverter are presented. Theoretical analysis, simulation results using MATLAB/SIMULINK and experimental results are provided to verify the operation of the suggested inverter.

• Proceedings of the KIPE Conference
• /
• 2003.07b
• /
• pp.621-624
• /
• 2003

In this paper, a novel multilevel inverter using DC-Link voltage combination is presented to reduce the harmonics of output voltage without the output filter inductor. The proposed multilevel inverter can generate 27-level output voltage. It employs three H-bridge cells which consist of single phase full-bridge inverter module. As well as, it can make continuous output voltage level employing the properly three DC-Link voltage ratio. The validity of the proposed inverter is verified through the experimental result using a prototype which can generate a 110[Vac], 60[Hz] output voltage from 12[Vdc], 36[vdc], and 108[Vdc] input voltages

• Proceedings of the KIPE Conference
• /
• 2018.07a
• /
• pp.105-107
• /
• 2018

This paper presents a new hybrid multilevel converter topology, which consists of a combination of the series connected switched capacitor units with boost ability, and an H-bridge with T-type bidirectional switches. The proposed converter boosts the input voltage without any bulky inductors, and has the small number of components, which can make the size and cost of a power converter greatly reduced. The output filter size and harmonics are also reduced by the high quality multilevel output. In addition, there is no need for complicated methods to balance the capacitor voltage. Simulation and experimental results with a nine-level converter system are presented to validate the proposed topology and modulation method.

• Journal of Power Electronics
• /
• v.15 no.4
• /
• pp.964-973
• /
• 2015

This paper presents a simple approach for the selective harmonic elimination (SHE) of multilevel inverter based on the transistor-clamped H-bridge (TCHB) family. The SHE modulation is derived from the sinusoidal voltage-angle equal criteria corresponding to the optimized switching angles. The switching angles are computed offline by solving transcendental non-linear equations characterizing the harmonic contents using the Newton-Raphson method to produce an optimum stepped output. Simulation and experimental tests are conducted for verification of the analytical solutions. An Altera DE2 field-programmable gate array (FPGA) board is used as the digital controller device in order to verify the proposed SHE modulation in real-time applications. An analysis of the voltage total harmonic distortion (THD) has been obtained for multiple output voltage cases. In terms of the THD, the results showed that the higher the number of output levels, the lower the THD due to an increase number of harmonic orders being eliminated.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.11 no.4
• /
• pp.313-320
• /
• 2006

In this paper, a design approach of LC trap filter for output side harmonic reduction of single phase NPC multilevel inverter is proposed, and THD of the output voltage and harmonic FFT of the output current are analyzed. The proposed filter consists of a conventional LCR filter cascaded with an LC trap filter and it is tuned to inverter switching frequency. A NPC multilevel inverter inverter is used an inverter system for high power application and DSP(TMS320C31) is used for the controller. The effectiveness of the proposed system confirmed through simulation and experimental results.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.18 no.2
• /
• pp.68-74
• /
• 2004

This paper presents a novel hybrid multilevel inverter using DC-Link voltage combination in order to improve the waveshape of output voltage and reduce harmonics. The proposed multilevel inverter can generate an 11-level output voltage. It employs three H-bridge cell, which consists of single phase full-bridge inverter module. Among them, two modules are used for level generation, and one module performs PWM switching. Nine levels are synthesised by the level inverter, and two levels are added to output by the PWM inverter. As a result, it generates an 11-level. The operational principles are explained in depth, and the validity of the proposed system is verified through the PSpice simulation and experimental results based on a prototype.