• 전력전자학회논문지
• /
• 제27권6호
• /
• pp.526-534
• /
• 2022

The modular multilevel converter (MMC) has been widely applied to various industrial areas because of its various advantages and structural characteristics. Therefore, many methods for synthesizing the output voltage of MMC have been studied. Among these methods, phase-shifted pulse width modulation (PSPWM) is frequently used in MMC systems because it has diverse merits, such as excellent output qualities even with a small number of cells and uniform power distribution among cells. In this study, the total harmonic distortion (THD) of the output voltage is analyzed in accordance with the number of cells in one arm of a single-delta bridge cell MMC in order to compare PSPWM methods in terms of the THD of the output voltage. The physical characteristics of the triangle and sawtooth carrier waves used for the PSPWM and the mathematical modeling of output voltage are introduced. Then, the obtained results are verified through real-time simulation of a 1 MW single-delta bridge cell MMC system.

• Journal of Electrical Engineering and Technology
• /
• 제13권1호
• /
• pp.270-279
• /
• 2018

This paper elucidates a hysteresis current controller for enhancing the performance of static synchronous compensator (STATCOM) using cascaded H-bridge multilevel inverter. Due to the rising power demand and growing conventional generation costs a new alternative in renewable energy source is gaining popularity and recognition. A five level single phase cascaded multilevel inverter with two separated dc sources, which is energized by photovoltaic - wind hybrid energy source. The voltages across the each dc source is balanced and standardized by the proposed hysteresis current controller. The performance of STATCOM is analyzed by connecting with grid connected system, under the steady state & dynamic state. To reduce the Total Harmonic Distortion (THD) and to improve the output voltage, closed loop hysteresis current control is achieved using PLL and PI controller. The performance of the proposed system is scrutinized through various simulation results using matlab/simulink and hardware results are also verified with simulation results.

• Journal of Electrical Engineering and Technology
• /
• 제12권6호
• /
• pp.2278-2288
• /
• 2017

Multilevel converter topologies are widely used in many applications. The cascaded H-bridge multilevel inverter (CHBMI), which is one of many multilevel converter topologies, has been introduced as a useful topology in high and medium power. However, it has a drawback to require a lot of switches. Therefore, the reliability of CHBMI is important factor for analyzing the performance. This paper presents a simple switch fault diagnosis method for single-phase CHBMI. There are two types of switch faults: open-fault and short-fault. In the open-fault, the body diode of faulty switch provides a freewheeling current path. However, when the short-fault occurs, the distortion of output current is different from that of the open-fault because it has an unavailable freewheeling current flow path due to a disconnection of fuse. The fault diagnosis method is based on the zero current time analysis according to zero-voltage switching states. Using the proposed method, it is possible to detect the location of faulty switch accurately. The PSIM simulation and experimental results show the effectiveness of proposed switch fault diagnosis method.

• 전력전자학회논문지
• /
• 제9권6호
• /
• pp.620-627
• /
• 2004

H-브릿지 멀티레벨 인버터는 여러 개의 단상 Power Cell을 직렬로 연결함으로써 저전압 전력용 반도체를 사용하여 고전압을 얻을 수 있고, 정현파에 가까운 출력전압 파형을 얻을 수 있는 멀티레벨 인버터 토폴로지이다. 본 논문은 산업현장에서 신뢰성을 인정받아 많이 사용되고 있는 직렬통신 방식의 일종인 CAN통신 인터럽터를 이용한 H-브릿지 멀티레벨 인버터 Power Cell의 PU 동기화 및 위상전이 방법에 관한 것이다. 제안된 방법의 주요 장점은 주제어기와 셀 제어기 사이에 직렬통신(CAN)을 사용함으로써 주제어기와 셀 제어기의 신호선의 단순화, 주제어기의 부담 감소, Power Cell의 모듈화, 셀 단위의 보호동작 용이, 확장성 향상 그리고 제어 신호 및 Power Cell의 신뢰성을 향상에 있다. 13레벨로 구성된 H-브릿지 멀티레벨 인버터 시험을 통해 제안된 방법의 타당성과 신뢰성을 입증하였다.

• Journal of Electrical Engineering and Technology
• /
• 제7권4호
• /
• pp.538-545
• /
• 2012

In this paper a novel cascaded transformer multilevel inverter is proposed. Each basic unit of the inverter includes two DC sources, single phase transformers and semiconductor switches. This inverter, which operates as symmetric and asymmetric, can output more number of voltage levels in the same number of the switching devices. Besides, the number of gate driving circuits is reduced, which leads to circuit size reduction and lower power consumption in the driving circuits. Moreover, several methods to determination of transformers turn ratio in proposed inverter are presented. Theoretical analysis, simulation results using MATLAB/SIMULINK and experimental results are provided to verify the operation of the suggested inverter.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(2)
• /
• pp.621-624
• /
• 2003

In this paper, a novel multilevel inverter using DC-Link voltage combination is presented to reduce the harmonics of output voltage without the output filter inductor. The proposed multilevel inverter can generate 27-level output voltage. It employs three H-bridge cells which consist of single phase full-bridge inverter module. As well as, it can make continuous output voltage level employing the properly three DC-Link voltage ratio. The validity of the proposed inverter is verified through the experimental result using a prototype which can generate a 110[Vac], 60[Hz] output voltage from 12[Vdc], 36[vdc], and 108[Vdc] input voltages

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2018년도 전력전자학술대회
• /
• pp.105-107
• /
• 2018

This paper presents a new hybrid multilevel converter topology, which consists of a combination of the series connected switched capacitor units with boost ability, and an H-bridge with T-type bidirectional switches. The proposed converter boosts the input voltage without any bulky inductors, and has the small number of components, which can make the size and cost of a power converter greatly reduced. The output filter size and harmonics are also reduced by the high quality multilevel output. In addition, there is no need for complicated methods to balance the capacitor voltage. Simulation and experimental results with a nine-level converter system are presented to validate the proposed topology and modulation method.

• Journal of Power Electronics
• /
• 제15권4호
• /
• pp.964-973
• /
• 2015

This paper presents a simple approach for the selective harmonic elimination (SHE) of multilevel inverter based on the transistor-clamped H-bridge (TCHB) family. The SHE modulation is derived from the sinusoidal voltage-angle equal criteria corresponding to the optimized switching angles. The switching angles are computed offline by solving transcendental non-linear equations characterizing the harmonic contents using the Newton-Raphson method to produce an optimum stepped output. Simulation and experimental tests are conducted for verification of the analytical solutions. An Altera DE2 field-programmable gate array (FPGA) board is used as the digital controller device in order to verify the proposed SHE modulation in real-time applications. An analysis of the voltage total harmonic distortion (THD) has been obtained for multiple output voltage cases. In terms of the THD, the results showed that the higher the number of output levels, the lower the THD due to an increase number of harmonic orders being eliminated.

• 전력전자학회논문지
• /
• 제11권4호
• /
• pp.313-320
• /
• 2006

본 논문에서는 단상 NPC 멀티레벨 인버터의 출력단 고조파 저감을 위한 LC 트랩 필터의 설계 방법을 제시하였고, 출력전압 THD와 출력전류 고조파 FFT 분석을 수행하였다. 제시된 LC 트랩 필터는 일반적인 LCR 필터와 종속 접속된 구조를 가지며, 스위칭 주파수에 동조되었다. 인버터 시스템은 고전력 응용에 적합한 NPC 멀티레벨 인버터를 사용하였으며, 제어기는 DSP(TMS320C31)을 사용하여 구성하였다. 제안된 시스템의 효용성은 시뮬레이션과 실험 결과를 통하여 증명하였다.

• 조명전기설비학회논문지
• /
• 제18권2호
• /
• pp.68-74
• /
• 2004

본 논문에서는 고조파를 저감시키고 출력파형 개선을 위한 방법으로 입력측 DC링크 전압의 조합을 이용한 새로운 하이브리드형 멀티레벨 인버터를 제안한다. 제안한 인버터는 단상 풀-브릿지 인버터 모듈로 구성된 3개의 H-bridge cell로 구성되어 있다. 2개의 풀-브릿지 모듈은 레벨생성을 위해 사용되고 나머지 하나의 모듈은 PWM 스위칭 동작에 사용되어진다. 레벨 생성을 위한 인버터에 의해 9레벨이 생성되고 PWM 동작을 위한 인버터에 의해 2레벨이 더해지게 되어 결과적으로 총 11레벨의 출력전압을 생성시킬 수 있다. 제안한 시스템의 기본적인 동작원리를 상세하게 설명하고 PSpice 시뮬레이션과 시작품을 이용한 실험을 통해 타당성을 증명할 수 있었다.