• Title/Summary/Keyword: Simulator Design

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Design and Implementation of a Real-time Automatic Disaster and Information Broadcasting System (시뮬레이션 프로그램 기반 실시간 자동재난 및 안내방송시스템의 설계)

  • Lee, Byung-Mun;Park, Jung-In;Kang, Un-Gu
    • Journal of Digital Convergence
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    • v.10 no.7
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    • pp.141-152
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    • 2012
  • The typical evacuation guidance system based on fire detectors, which is being widely used in theaters and large buildings, is often operated in an analog manner. In case of fire, it often causes the system to lose a wired line or wireless fire detection sensor, resulting in the difficulty of transmitting signals from a wired or wireless fire detection sensor to the main fire monitoring device. Accordingly, this paper has proposed the broadcasting system for disaster management, having an efficient evacuation guidance plan when a disaster occurs. The system reacts to an emergency situation along with fire alarm sirens in real time. We have implemented the above system by means of a simulation program that prints the evacuation guidance information (e.g., location and time of fire, and evacuation path) on an LCD located in a building through the fire sensor network in case of an emergency (e.g., actual fire). We have developed the simulation system by using mathematical algorithms, such as the optimal path search and the fire smoke diffusion algorithm. This simulation program considers the structure of a building and the location where the fire has initially occurred, applying it to the simulator.

Design of Boost Converter PFC IC for Unity Power Factor Achievement (단일 역률 달성을 위한 Boost Converter용 PFC IC 설계)

  • Jeon, In-Sun;Kim, Hyoung-Woo;Kim, Ki-Hyun;Seo, Kil-Soo;Jo, Hyo-Mun;Lee, Jong-Hwa
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.2
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    • pp.60-67
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    • 2010
  • We designed Average Current Control PFC IC which has make the average value of boost inductor current became the shape of sine wave. Designed IC has fixed frequency of 75kHz to meet EMI standard requirement. And also RC compensation loop has been designed into the error amp and the current amp, in order that it has wide bandwidth for high speed control. And we use the oscillator which generates by square wave and triangle wave, and add to UVLO, OVP, OCP, TSD which is in order to operate stability. We simulated by using Spectre of Cadence to verify the unity power factor function and various protection circuits and fabricated in a $1{\mu}m$ High Voltage(20V) CMOS process.

Designing a Common Weapon Interface Module While Taking into Account the Fire Control System Architecture of a Light Armed Helicopter (소형무장헬기 사격통제시스템의 구조를 고려한 공통 무장 인터페이스 모듈 설계)

  • Lee, Dongho;Park, Hanjoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39C no.11
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    • pp.1088-1093
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    • 2014
  • The structure of the fire control system(FCS) of a light armed helicopter and effective logistics support was taken into account in the proposed common weapon interface module(CWIM) for a distributed FCS. The pros and cons of a distributed FCS and a centralized FCS were analyzed, then a CWIM which can be applied to the weapon interface module of a distributed FCS was designed and fabricated. Integration tests between the proposed CWIM and a weapon simulator were conducted to ascertain whether or not the proposed CWIM could be applicable to a distributed FCS. We expect that the CWIM design approach method secured through this study will be helpful in mitigating cable work of the FCS which will be applied to a Light Armed Helicopter and controlling various weapons.

Manufacture of a single gate MESFET mixer at PCS frequency band (PCS 주파수 대역 단일 게이트 MESFET 혼합기의 제작)

  • 이성용;임인성;한상철;류정기;오승엽
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.9 no.1
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    • pp.25-33
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    • 1998
  • In this paper, we describe a single-gate MESFET mixer at PCS(Personal Communication Service) frequency band. The PCS frequency band is 1965~2025 MHz in FR and 140 MHz in IF irrespectly. The design of the mixer was executed by microwave simulator, EEsof Libra. The matching network is consisted of rectangular inductor, MIM capacitor and open stub. The ma- nufacture work was accomplished by the micro-pen and wedge-bonder. The mixer showed $6.69\pm0.65$ dB of conversion gain, $-14.9\pm3.5$dB of RF reflection coefficient and 57.83 dB of LO/IF isolation at 10 dBm of LO power when LO frequency is 1855 MHz. When this mixer is used at PCS terminal, IF-amplifier which compensates the conversion loss of diode mixer may be omitted.

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The Design of a Broadband E-plane H Sectoral Horn Phased Array Antenna Using Mutual Coupling (상호 결합을 이용한 광대역 E-면 H 섹터 혼 위상 배열 안테나 설계)

  • Lee, Cheol-Soo;Pack, Jeong-Ki
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.6 s.121
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    • pp.620-628
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    • 2007
  • An H-sector horn antenna has a constant beam coverage characteristic and it can be useful for application to a wide band phased array antenna system. In this paper, we designed a broadband E-plane H-sector horn phased-array antenna, which has a 3:1 bandwidth and ${\pm}60^{\circ}$ beam steering capability. An H-sector hem antenna was designed to have $30{\sim}50^{\circ}$ half-power beam width in the principal H-plane. The active reflection coefficient including mutual coupling was calculated using a waveguide simulator, and the active reflection characteristic was improved by mutual coupling over wide frequency range. Using these results, an $8{\times}1$ H-sector phased array antenna was fabricated. The measurement results for the half-power beam width in the principal H-plane and the active reflection coefficient showed a good agreement with the simulation results. The peak-value pattern in the steered radiation beams also agreed well with the active element pattern. The measured active reflection coefficients within the beam steering range are mostly less than 0.3 over the 3:1 frequency range.

Design of Dispersed Clustering Algorithm for Efficient Energy Management in Wireless Sensor Network (무선 센서 네트워크에서 효율적인 에너지 관리를 위한 분산형 클러스터링 알고리즘 설계)

  • Jeon, Min-Ho;Kang, Chul-Gyu;Oh, Chang-Heon
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.10a
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    • pp.839-842
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    • 2011
  • Lately Various researches on energy harvesting techniques for wireless sensor networks have been performed to overcome the power limitation of sensor nodes. In wireless sensor networks with harvesting techniques, sensor nodes exploit environmental energy, such as solar or wind energy, as the power sources of the nodes. Existing energy constrained environment routing protocols may not be suitable for energy harvesting based wireless sensor networks because they do not consider the accumulated energy from harvesting devices. In addition, the paths which aren't dispersed shorten the network lifetime. Therefore, in this paper, the algorithm that the path between each node is dispersed is proposed. In case of using the algorithm to be proposed through the simulator it showed that path of the node is variously reflected.

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Hardware Design of AES Cryptography Module Operating as Coprocessor of Core-A Microprocessor (Core-A 마이크로프로세서의 코프로세서로 동작하는 AES 암호모듈의 하드웨어 설계)

  • Ha, Chang-Soo;Choi, Byeong-Yoon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.12
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    • pp.2569-2578
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    • 2009
  • Core-A microprocessor is the all-Korean product designed as 32-bit embedded RISC microprocessor developed by KAIST and supported by the Industrial Property Office. This paper analyze Core-A microprocessor architecture and proposes efficient method to interface Core-A microprocessor with coprocessor. To verify proposed interfacing method, the AES cryptography processor that has 128-bit key and block size is used as a coprocessor. Coprocessor and AES are written in Verilog-HDL and verified using Modelsim simulator. It except AES module consists of about 3,743 gates and its maximum operating frequency is about 90Mhz under 0.35um CMOS technology. The proposed coprocessor interface architecture is efficiency to send data or to receive data from Core-A to coprocessor.

Design and Simulation of a Flow Mobility Scheme Based on Proxy Mobile IPv6

  • Choi, Hyon-Young;Min, Sung-Gi;Han, Youn-Hee;Koodli, Rajeev
    • Journal of Information Processing Systems
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    • v.8 no.4
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    • pp.603-620
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    • 2012
  • Proxy Mobile IPv6 (PMIPv6) is a network-based mobility support protocol and it does not require Mobile Nodes (MNs) to be involved in the mobility support signaling. In the case when multiple interfaces are active in an MN simultaneously, each data flow can be dynamically allocated to and redirected between different access networks to adapt to the dynamically changing network status and to balance the workload. Such a flow redistribution control is called "flow mobility". In the existing PMIPv6-based flow mobility support, although the MN's logical interface can solve the well-known problems of flow mobility in a heterogeneous network, some missing procedures, such as an MN-derived flow handover, make PMIPv6-based flow mobility incomplete. In this paper, an enhanced flow mobility support is proposed for actualizing the flow mobility support in PMIPv6. The proposed scheme is also based on the MN's logical interface, which hides the physical interfaces from the network layer and above. As new functional modules, the flow interface manager is placed at the MN's logical interface and the flow binding manager in the Local Mobility Anchor (LMA) is paired with the MN's flow interface manager. They manage the flow bindings, and select the proper access technology to send packets. In this paper, we provide the complete flow mobility procedures which begin with the following three different triggering cases: the MN's new connection/disconnection, the LMA's decision, and the MN's request. Simulation using the ns-3 network simulator is performed to verify the proposed procedures and we show the network throughput variation caused by the network offload using the proposed procedures.

Development of GPS Baseband Chip (GPS Baseband Chip 개발)

  • Cho, Jae-Bum;Lee, Tae-Hyoung;Lee, Yoon-Jick;Heo, Jung-Hun;Jung, Hwi-Sung;Jeong, Jun-Young;Yoon, Suk-Ki;Kim, Hak-Soo;Cho, Dong-Sik;Choi, Hoon-Soon
    • Proceedings of the KIEE Conference
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    • 2003.07d
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    • pp.2313-2315
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    • 2003
  • This paper presents the development methods which Samsung GPS baseband chip is called S3E4510X. Specification of S3E4510X and design methodology of baseband architecture is presented with a study of their effects. Also GPS core block and software are described in detail. We designed and implemented the test board with RF module for evaluating performance via static test dynamic test and each performance factors using live signal and CPS simulator. Test results show that our development GPS baseband chip have effectively performance for mobile handset Location Based Service (LBS) and its practical use for navigation.

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DEVELOPMENT AND IMPLEMENTATION OF DISTRIBUTED HARDWARE-IN-THE-LOOP SIMULATOR FOR AUTOMOTIVE ENGINE CONTROL SYSTEMS

  • YOON M.;LEE W.;SUNWOO M.
    • International Journal of Automotive Technology
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    • v.6 no.2
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    • pp.107-117
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    • 2005
  • A distributed hardware-in-the-loop simulation (HILS) platform is developed for designing an automotive engine control system. The HILS equipment consists of a widely used PC and commercial-off-the-shelf (COTS) I/O boards instead of a powerful computing system and custom-made I/O boards. The distributed structure of the HILS system supplements the lack of computing power. These features make the HILS equipment more cost-effective and flexible. The HILS uses an automatic code generation extension, REAL-TIME WORKSHOP$^{ (RTW$^{) of MATLAB$^{ tool-chain and RT-LAB$^{, which enables distributed simulation as well as the detection and generation of digital event between simulation time steps. The mean value engine model, which is used in control design phase, is imported into this HILS. The engine model is supplemented with some I/O subsystems and I/O boards to interface actual input and output signals in real-time. The I/O subsystems are designed to imitate real sensor signals with high fidelity as well as to convert the raw data of the I/O boards to the appropriate forms for proper interfaces. A lot of attention is paid to the generation of a precise crank/ earn signal which has the problem of quantization in a conventional fixed time step simulation. The detection of injection! command signal which occurs between simulation time steps are also successfully compensated. In order to prove the feasibility of the proposed environment, a simple PI controller for an air-to-fuel ratio (AFR) control is used. The proposed HILS environment and I/O systems are shown to be an efficient tool to develop various control functions and to validate the software and hardware of the engine control system.