• Korean Journal of Materials Research
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• v.16 no.10
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• pp.652-655
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• 2006

A direct wafer bonding process necessary for GaAs-on-insulator (GOI) fabrication with high thermal annealing temperatures was studied by using PECVD oxides between gallium arsenide and silicon wafers. In order to apply some uniform pressure on initially-bonded wafer pairs, a graphite sample holder was used for wafer bonding. Also, a tool for measuring the tensile forces was fabricated to measure the wafer bonding strengths of both initially-bonded and thermally-annealed samples. GaAs/$SiO_2$/Si wafers with 0.5-$\mu$m-thick PECVD oxides were annealed from $100^{\circ}C\;to\;600^{\circ}C$. Maximum bonding strengths of about 84 N were obtained in the annealing temperature range of $400{\sim}500^{\circ}C$. The bonded wafers were not separated up to $600^{\circ}C$. As a result, the GOI wafers with high annealing temperatures were demonstrated for the first time.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.3 s.36
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• pp.187-196
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• 2005

MEMS devices such as a vibratory gyroscope often suffer from a lower yield rate due to fabrication errors and the external stress. In the decoupled vibratory gyroscope, the main factor that determines the yield rate is the frequency difference between the sensing and driving modes. The gyroscope, fabricated with SOI (Silicon-On-Insulator) wafer and packaged using the anodic bonding, has a large wafer bowing caused by thermal expansion mismatch as well as non-uniform surfaces of the structures caused by the notching effect. These effects result in large distribution in the frequency difference, and thereby a lower yield rate. To improve the yield rate we propose a packaged SiOG (Silicon On Glass) technology. It uses a silicon wafer and two glass wafers to minimize the wafer bowing and a metallic membrane to avoid the notching. In the packaged SiOG gyroscope, the notching effect is eliminated and the warpage of the wafer is greatly reduced. Consequently the frequency difference is more uniformly distributed and its variation is greatly improved. Therefore we can achieve a more robust vibratory MEMS gyroscope with a higher yield rate.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.7
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• pp.424-432
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• 2000

The plasma surface treatment, using hydrogen gas, of the silicon wafer was investigated as a pretreatment for the application to silicon-on-insulator (SOI) wafers using the silicon direct bonding technique. The chemical reactions of hydrogen plasma with surfaces were used for both the surface activation and the removal of surface contaminants. As a result of exposure of silicon wafer to the plasma, an active oxide layer was formed on the surface, which was rendered hydrophilic. The surface roughness and morphology were estimated as functions of plasma exposing time as well as of power. The surface became smoother with decreased incident hydrogen ion flux by reducing plasma exposing time and power. This process was very effective to reduce the carbon contaminants on the silicon surface, which was responsible for a high initial surface energy. The initial surface energy measured by the crack propagation method was 506 mJ/m2, which was up to about three times higher than that of a conventional RCA cleaning method.

• Proceedings of the Korean Vacuum Society Conference
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• 2009.02a
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• pp.244.2-244.2
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• 2009

• Proceedings of the Materials Research Society of Korea Conference
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• 1996.11a
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• pp.90-91
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• 1996

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.830-833
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• 2003

This paper describes the fabrication and characteristics of 3C-SiCOI sotctures by SDB and etch-back technology for high-temperature MEMS applications. In this work, insulator layers were formed on a heteroepitaxial 3C-SiC film grown on a Si(001) wafer by thermal wet oxidation and PECVD process, successively. The pre-bonding of two polished PECVD oxide layers made the surface activation in HF and bonded under applied pressure. The wafer bonding characteristics were evaluated by the effect of HF concentration used in the surface treatment on the roughness of the oxide and pre-bonding strength. Hydrophilic character of the oxidized 3C-SiC film surface was investigated by ATR-FTIR. The strength of the bond was measured by tensile strengthmeter. The bonded interface was also analyzed by SEM. The properties of fabricated 3C-SiCOI structures using etch-back technology in TMAH solution were analyzed by XRD and SEM. These results indicate that the 3C-SiCOI structure will offers significant advantages in the high-temperature MEMS applications.

• Journal of Integrative Natural Science
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• v.3 no.1
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• pp.7-18
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• 2010

Ethylene-bridged silsesquioxane resins were synthesized from two monomers: 1,2-bis(trimethoxysilyl)ethane and methyltrimethoxysilane. The silsesquioxane thin films were spin-coated from the copolymerized resins on silicon wafer. Metal insulator metal (MIM), metal insulator semiconductor (MIS) devices were utilized to investigate the electrical properties of the copolymerized thin films. As the films were inserted as gate insulator in the OTFT devices, the field effect mobilitites were evaluated by employing Poly(3-hexylthiophene) (P3HT) as organic semiconductor, which shows that their dielectric properties and mobility values are dependent on the molecular structures and Si-OH concentration involving in the films.

• Journal of Sensor Science and Technology
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• v.19 no.2
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• pp.137-141
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• 2010

In this paper, we fabricated silicon piezoresistive pressure sensor with dry etching technology which used Deep-RIE and etching delay technology which used SOI(silicon-on-insulator) wafer. We improved pressure sensor offset and its temperature dependence by removing oxidation layer of SOI wafer which was used for dry etching delay layer. Sensitivity of the fabricated pressure sensor was about 0.56 mV/V${\cdot}$kPa at 10 kPa full-scale, and nonlinearity of the fabricated pressure sensor was less than 2 %F.S. The zero off-set change rate was less than 0.6 %F.S.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.4
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• pp.161-168
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• 2001

Organic thin film transitors(TFTs) are of interest for use in broad area electronic applications. For example, in active matrix liquid crystal displays(AMLCDs), organic TFTs would allow the use of inexpensive, light-weight, flexible, and mechanically rugged plastic substrates as an alternative to the glass substrates needed for commonly used hydrogenated amorphous silicon(a-Si:H). Recently pentacene TFTs with carrier field effect, mobility as large as 2 $cm^2V^{-1}s^{-1}$ have been reported for TFTs fabricated on silicon substrates, and it is higher than that of a-Si:H. But these TFTs are fabricated on silicon wafer and $SiO_2$ was used as a gate insulator. $SiO_2$ deposition process requires a high insulator which is polyimide and photo acryl. We investigated trasfer and output characteristics of the thin film transistors having active layer of pentacene. We calculated field effect mobility and on/off ratio from transfer characteristics of pentacene thin film transistor, and measured IR absorption spectrum of polymide used as the gate dielectric layer. It was found that using the photo acryl as a gate insulator, threshold voltage decreased from -12.5 V to -7 V, field effect mobility increased from 0.012 $cm^2V^{-1}s^{-1}$ to 0.039 $cm^2V^{-1}s^{-1}$ , and on/off current ratio increased from $10^5\;to\;10^6$. It seems that TFTs using photo acryl gate insulator is apt to form channel than TFTs using polyimide gate insulator.

• ETRI Journal
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• v.17 no.4
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• pp.1-12
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• 1996

A novel body-tied silicon-on-insulator(SOI) n-channel metal-oxide-semiconductor field-effect transistor with grounded body electrode named GBSOI nMOSFET has been developed by wafer bonding and etch-back technology. It has no floating body effect such as kink phenomena on the drain current curves, single-transistor latch and drain current overshoot inherent in a normal SOI device with floating body. We have characterized the interface trap density, kink phenomena on the drain current ($I_{DS}-V_{DS}$) curves, substrate resistance effect on the $I_{DS}-V_{DS}$ curves, subthreshold current characteristics and single transistor latch of these transistors. We have confirmed that the GBSOI structure is suitable for high-speed and low-voltage VLSI circuits.