• 제목/요약/키워드: Signal process unit

검색결과 137건 처리시간 0.025초

모델화 채널필터에 대한 인버스필터링 (Inverse Filtering for a Modelling Channel Filter)

  • 김성호;주창복
    • 융합신호처리학회 학술대회논문집
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    • 한국신호처리시스템학회 2000년도 하계종합학술대회논문집
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    • pp.17-20
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    • 2000
  • In a digital communication system, the transmission channel may introduce error into the digital signal being transmitted. It would be useful if a process could be devised so that the error could be removed in order to recover the transmitted digital signal. We design a corrective filter that is inverse filter, which will generate an output signal identical to the input signal. in order for two systems connected in cascade to produce an output which is identical to the input signal, the over-all unit sample response of the cascade connection must be a unit sample function.

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저널베어링 상태 진단을 위한 최적의 데이터 분석 기준 설정 (Optimal Datum Unit Definition for Diagnostics of Journal Bearing System)

  • 윤병동;정준하;전병철;김연환;배용채
    • 한국소음진동공학회:학술대회논문집
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    • 한국소음진동공학회 2014년도 추계학술대회 논문집
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    • pp.84-89
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    • 2014
  • Data-driven method for fault diagnostics system often use machine learning technique. To use such technique proper signal processing should be implemented such as time synchronous averaging (TSA) for ball bearing systems. However, for journal bearing diagnostics systems not much has been researched, and yet a proper signal processing method has not been studied. Therefore, in this research an optimal datum unit for a reliable journal bearing diagnostics system along with angular resampling process is being suggested. Before extracting time and frequency domain features, angular resampling is applied to each cycle of vibration data. As to preserve the characteristics of vibration signal, averaging method is replaced by finding the optimal datum unit which strengthens statistical characteristics of vibration signal. Then 20 features were extracted for various cases, and those features are being evaluated by two criteria, separability and classification accuracy.

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원자로 제어봉 구동장치 제어시스템용 전력제어기 FPGA 설계 (Design of FPGA in Power Control Unit for Control Rod Control System)

  • 이종무;신종렬;김춘경;박민국;권순만
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 B
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    • pp.563-566
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    • 2003
  • We have designed the power control unit which belongs to the power cabinet and controls the power supplied to Control Rod Drive Mechanism(CRDM) as a digital system based on Digital Signal Processor(DSP). The power control unit dualized as the form of Master/Slave has had its increased reality. The Central Process Unit(CPU) board of a power control unit possesses two Digital Signal Processors(DSPs) of the control DSP for performing the tasks of power control and system monitoring and the communication of the Control DSP and the Communication DSP. To accomplish the functions requested in the power control unit effectively, we have installed Field Programmable Gate Arrays(FPGAS) on the CPU board and have FPGAs perform the memory mapping, the generation of each chip selection signal, the giving and receiving of the signals between the power controllers dualized, the fault detection and the generation of the firing signals.

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시간-주파수 분석에 의한 금형 마모 분석 (Stamping Tool Wearing Analysis by Time-Frequency Analysis)

  • 이창희;한호영;서건석;김용연
    • 한국생산제조학회지
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    • 제19권3호
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    • pp.407-413
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    • 2010
  • This paper reports on the research which analyzes acoustic signals acquired in progressive compressing, hole blanking, and burr compacting process. An acoustic sensor was set on the bed of hydraulic press. Acoustic signal is generated from progressive stamping process. First the signal acquired from the unit process; compressing, blanking or compacting, is studied by Fourier Transform and Short Time Fourier Transform. The blanking process emitted ultrasonic signal with more than 20kHz, but the compressing and compacting processes emitted acoustic signals with lower than 10kHz. The combined signals periodically acquired right after the tool grinding were then analyzed. 70-80kHz signals appeared in time-frequency domain, but not in the frequency domain, the magnitude of which was related to the tool wear. Short Time Fourier Transform made up for the Fourier Transform in analyzing the emitted signal for stamping process in the ultrasonic domain.

Expert Network의 모듈형 계층구조를 이용한 범용 연산회로 설계 (General Purpose Operation Unit Using Modular Hierarchical Structure of Expert Network)

  • 양정모;홍광진;조현찬;서재용;전홍태
    • 한국지능시스템학회:학술대회논문집
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    • 한국퍼지및지능시스템학회 2003년도 추계 학술대회 학술발표 논문집
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    • pp.122-125
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    • 2003
  • By advent of NNC(Neural Network Chip), it is possible that process in parallel and discern the importance of signal with learning oneself by experience in external signal. So, the design of general purpose operation unit using VHDL(VHSIC Hardware Description Language) on the existing FPGA(Field Programmable Gate Array) can replaced EN(Expert Network) and learning algorithm. Also, neural network operation unit is possible various operation using learning of NN(Neural Network). This paper present general purpose operation unit using hierarchical structure of EN EN of presented structure learn from logical gate which constitute a operation unit, it relocated several layer The overall structure is hierarchical using a module, it has generality more than FPGA operation unit.

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Testing for a Unit Root in an ARIMA(p,1,q) Signal Observed with Measurement Error

  • Lee, Jong-Hyup;Shin, Dong-Wan
    • Journal of the Korean Statistical Society
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    • 제24권2호
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    • pp.481-493
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    • 1995
  • An ARIMA signal observed with measurement error is shown to have another ARIMA representation with nonlinear restrictions on parameters. For this model, the restricted Newton-Raphson estimator(RNRE) of the unit root is shown to have the same limiting distribution as the ordinary least squares estimator of the unit root in an AR(1) model tabulated by Dickey and Fuller (1979). The RNRE of parameters of the ARIMA(p,1,k) process and unit root tests base on the RNRE are developed.

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Testing for a unit root in an AR(p) signal observed with MA(q) noise when the MA parameters are unknown

  • Jeong, Dong-bin;Sahadeb Sarkar
    • Journal of the Korean Statistical Society
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    • 제27권2호
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    • pp.165-187
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    • 1998
  • Shin and Sarkar (1993, 1994) studied the problem of testing for a unit root in an AR(p) signal observed with MA(q) noise when the MA parameters are known. In this paper we consider the case when the MA parameters are unknown and to be estimated. Test statistics are defined using unit root parameter estimates based on three different estimation methods of Hannan and Rissanen (1982), Kohn (1979) and Shin and Sarkar (1995). An AR(p) process contaminated by MA(q) noise is a .estricted ARMA model, for which Shin and Sarkar (1995) derived an easy-to-compute Newton- Raphson estimator The two-stage estimation p.ocedu.e of Hannan and Rissanen (1982) is used to compute initial parameter estimates in implementing the iterative estimation methods of both Shin and Sarkar (1995) and Kohn (1979). In a simulation study we compare the relative performance of these unit root tests with respect to both size and power for p=q=1.

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웨이브렛 필터를 이용한 복합 중첩 근신호의 최적화 분리 알고리즘 (An Algorithm for the Optimum Separation of Superimposed EMG Signal Using Wavelet Filter)

  • 이영석;김성환
    • 대한의용생체공학회:의공학회지
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    • 제17권3호
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    • pp.319-326
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    • 1996
  • Clinical myography(EMG) is a technique for diagnosing neuromuscular disorders by analyzing the electrical signal that can be records by needle electrode during a muscular contraction. The EMG signal arises from electrical discharges that accompany the generation of force by groups of muscular fiber, and the analysis of EMG signal provides symptoms that can distinguish disorder of mLecle from disor- ders of nerve. One of the methods for analysis of EMG signal is to separate the individual discharge-the motor unit action potentials(MVAPS) - from EMG signal. But we can only observe the EMG signal that is a superimposed version of time delayed MUAPS. To obtain the information about MUAP(, i.e., position, firing number, magnitude etc), first of all, a method that can separate each MUAP from the EMG signal must be developed Although the methods for MUAP separation have been proposed by many researcherl they have required heavy computational burden. In this paper, we proposed a new method that has less computational burden and performs more reliable separation of superimposed EMG signal using wavelet filter which has multiresolution analysis as major property. As a result, we develope the separation algorithm of superimposed EMG signal which has less computational burden than any other researchers and exacutes exact separation process. The performance of this method has been discussed in the automatic resolving procedure which is neccessary to identify every firing of every motor unit from the EMG pattern.

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무선센서네트워크 기반의 미소자기감지 시스템 개발 (Implementation of micro-magnetic detection system based on wireless sensor networks)

  • 이영동;박종훈;강학성
    • 한국정보통신학회:학술대회논문집
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    • 한국정보통신학회 2014년도 춘계학술대회
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    • pp.402-403
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    • 2014
  • 미소자기감지 시스템은 자기신호를 전기신호로 변환하여 신호처리부로 송신하는 과정에서 AC성 노이즈가 유입되고, 필터링 과정에서 과도한 신호의 시간 및 위상 지연 현상이 발생한다. 본 논문에서는 상기의 문제점을 해결하기 위하여 무선통신 기술을 적용한 미소자기 감지 시스템을 설계하고 구현하였다. 미소자기시스템은 자기 센서 검출부, 신호처리부, 무선센서네트워크부, 시스템 제어부 및 모니터링부로 구성하였으며, 무선센서네트워크 기반의 센서의 무선화 적용을 통해 신호 노이즈 및 신호 지연을 최소화 하는 결과를 얻을 수 있었다.

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모듈형 구조를 갖는 범용 뉴럴 연산회로 설계 (Design on Neural Operation Unit with Modular Structure)

  • 김종원;조현찬;서재용;조태훈;이성준
    • 한국지능시스템학회:학술대회논문집
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    • 한국퍼지및지능시스템학회 2006년도 춘계학술대회 학술발표 논문집 제16권 제1호
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    • pp.125-129
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    • 2006
  • By advent of NNC(Neural Network Chip), it is possible that process in parallel and discern the importance of signal with learning oneself by experience in external signal. So, the design of general purpose operation unit using VHDL(VHSIC Hardware Description Language) on the existing FPGA(Field Programmable Gate Array) can replaced EN(Expert Network) and learning algorithm. Also, neural network operation unit is possible various operation using learning of NN(Neural Network). This paper present general purpose operation unit using hierarchical structure of EN. EN of presented structure learn from logical gate which constitute a operation unit, it relocated several layer. The overall structure is hierarchical using a module, it has generality more than FPGA operation unit.

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