• Journal of the Korea Institute of Military Science and Technology
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• v.9 no.1 s.24
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• pp.89-98
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• 2006

This paper describes signal attenuation characteristics as splicing the output on LVDT for stability and reliability of switching mechanism, which is developed to use common signal between FLCC and EDFLCC, on T-50 aircraft. The method of test is classified a Pspice simulation and an actual hardware evaluation. The difference of error margin for two methods is 10times, the latter higher. The result in this experiment shows that the signal attenuation as splicing the output on LVDT doesn't affect and the static error margin is 53% for develope the EDFLCC.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2006.10a
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• pp.293-316
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• 2006

[ $\blacksquare$ ] I/O Signal $\square$ We see adequate margin for the RC B design $\square$ Minimum ODW value is 328ps using Ac to DC measurement for the read case. $\square$ Minimum ODW value is 350ps using AC to DC mesurement method for the write case. $\blacksquare$ CLK Signal $\square$ The slew-rate decreases when the Cterm value increases $\square$ Lower slew-rate could effect delay and jitter. $\square$ There are some ldge issues during transitions with lower Cterm and without Cterm. $\square$ Our recommendation for the Cterm value range is between 1.5pF to 2.4pF. $\blacksquare$ ADD/CMD/Ctrl Signal $\square$ High output slew-rate at low VDD causes ring back that reduces voltage margin because of x-talk. $\square$ 30ohm Rterm for the CTRL signal shows a better signal integrity result compared to 36ohm.

• The Journal of the Acoustical Society of Korea
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• v.4 no.1
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• pp.16-21
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• 1985

Both shifiting the input signal's frequencies by a fixed frequency and compressing the input signal's bandwidth have been known to be effective in improving the stability margin of public adress systems operating in reverberant spaces. This paper describes the effect of an alternative approach of improving the acoustic-feedback stability and yet maintaining speech inteligibility by bandwidth compression and expansion. Conditions are derived for this technizue to be realized and an experimental system has been made - up. A series of experiments has been performed in small spaces and the results have shown that more than 5dB improvement can be obtained in the stability margin.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.386-389
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• 2013

In this paper, for signal integrity analysing high-speed signal between a processor and a DDR2 memory, transient analysis is done and eye diagrams are generated using IBIS models of IC chips and S-parameters of transmission line. From the eye diagrams of such high-speed signals as DQ, DQS/DQSb, Clock, Address and Control, signal quality is assured through measuring timing and voltage margins during setup and hold times and verifying that the over-/under-shoot and the cross points of differential signals satisfy their specifications.

• Korean Journal of Optics and Photonics
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• v.10 no.2
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• pp.169-173
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• 1999

We have experimentally investigated the eye margin characteristics of intensity modulated 10Gb/s NRZ signals in optically amplified systems depending on optical signal-to-noise ratio and chromatic dispersion. For the practical system application, the minimum optical signal-to-noise ratio was 25 dB. We utilized the negative chirped transmitter and a dispersion compensation fiber to compensate the chromatic dispersion in single mode fiber. We found the optimum eye opening and receiver sensitivity in case of the residual dispersion of 0~+935 ps/nm.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.4
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• pp.176-181
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• 2001

As the data rate between chip-to-chip gets high, the skin effect and load of pins deteriorate noise margin. With these, noise disturbances on the bus channel make it difficult for receiver circuits to read the data signal. This paper has proposed a new pre-emphasis driver circuit which achieves wide noise margin by enlarging the signal voltage range during data transition. When data is transferred from a memory chip to a controller, the output boltage of the driver circuit reaches the final values through the intermediate voltage level. The proposed driver supplies more currents applicable to a packet-based memory system, because it needs no additional control signal and realizes very small area. The circuit has been designed in a 0.18 ${\mu}m$ CMOS process, and HSPICE simulation results have shown that the data rate of 1.32 Gbps be achieved. Due to its result, the proposed driver can achieved higher speed than conventional driver by 10%.

• Proceedings of the IEEK Conference
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• 2009.05a
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• pp.326-328
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• 2009

we an autotuning algorithm for PI controller with unknown plant. The proposed algorithm uses a saturation function and time delay element as a test signal. Since the integral element of PI controller reduces a phase margin and amplitude margin in the closed loop system, the closed loop system could be resulted in unstable with PI controller, To avoid unstable in the closed loop system with PI controller, the proposed algorithm identifies one point information in the 3rd quadrant of Nyquist plot with a time delay element. The proposed method improves an accuracy of one point identified information with one saturation function.

• Proceedings of the Korean Society of Propulsion Engineers Conference
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• 2004.03a
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• pp.380-384
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• 2004

A fuel spiking test was performed to measure the surge margin of the compressor in a gas turbine engine. During the test, fuel spiking signal was superimposed on the engine controller demand and the mixed signals were used to control a fuel line servo-valve. For the superimposition, a subsystem composed of a fuel controller and a function generator was used. During the fuel spiking test, the original scheduled fuel signals and the modified signals were compared to guarantee the consistency excluding the spiking signals. The spiking signals were carefully selected to maintain the engine speed constant. The fuel spiking effects were checked by three dynamic pressure sensors. Sensors were placed before the servo-valve, after the servo-valve, and after the compressor location, respectively. The modulations of the spiking signal duration and fuel flow rate were examined to make the- operating point approach the surge region. The real engine test was performed at the Altitude Engine Test Facility (AETF) in Korea Aerospace Research Institute (KARI). In the real engine test, fuel spiking signals with 25~50 ㎳ of spiking signal time and 17~46 % of base fuel flow rate condition were used. The dithering signal was 5~6 ㎃ at 490 Hz. The test results showed good agreement between the fuel spiking signals and the fuel line pressure signals. Also, the compressor discharge pressure signals showed fuel spiking effects and the changes of the operating point on the compressor characteristic map could be traced.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.6A
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• pp.782-793
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• 2000

This paper presents a simple dynamical prediction scheme of the signal level which is attenuated and varied due to rain fading in satellite communication links using above 10GHz frequency bands. The proposed prediction scheme has four functional blocks for discrete-time low-pass filtering, slope-based prediction, mean-error correction and hybrid fixed/variable prediction margin allocation. Through simulations using Ka-band attenuation data obtained from the data measured over Ku-band by frequency-scaling, it is shown that the slope-based prediction with the mean-error correction has as small standard deviation of prediction error as below 1 dB, and that the error is about 1.5 to 2.5 times as small as that without the mean-error correction. The hybrid prediction margin allocation requires smaller average margin than those of both fixed and variable methods.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1555-1557
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• 2002

We have investigated the precharge type sense amplifier, it is suitable fur voltage sensing in a NOR type single transistor ferroelectric field effect transistor (1T FeFET) memory read operation. The proposed precharge type sense amplifier senses the bit line voltage of 1T FeFET memory. Therefore, the reference celt is not necessary compared to current sensing in 1T FeFET memory, The high noise margin is wider than the low noise margin in the first inverter because requires tile output of precharge type sense amplifier high sensitivity to transition of input signal. The precharge type sense amplifier has very simple structure and can sense the bit line signal of the 1T FeFET memory cell at low voltage.