• Journal of the Korean Society of Fisheries and Ocean Technology
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• v.30 no.4
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• pp.263-272
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• 1994

The hardware and the software of the prototype telemtry system to monitor the behavior of the fish are designed. This system consistes of five parts I. e. three omni-directional hydrophones, three ultrasonic receivers, a single board computer for the signal processing, two RF transceivers for the data communication, and a personnel computer. The sensitivty of the hydrophones is -170dB(re 1V/$\mu$Pa), the gain and the 3dB receiving bandwidth of the ultrasonic receivers are 115dB and 1500Hz respectively, and the sampling period is 33.3$\mu$sec in the signal processing part. The positioning error of the system using hyperbolic method is estimated to be less than 0.2m in case that the pinger locates inside of the baselines. The perfomance of the system considering a practical use was examined by numerical simulation and a water tank test of a pinger tracking experiment. In results, the system developed in prototype was confirmed that it could be useful for monitoring the behavior of fish in the limited water area.

• Journal of Institute of Control, Robotics and Systems
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• v.8 no.4
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• pp.338-344
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• 2002

In this paper, neural network force tracking control is proposed. The conventional impedance function is reformulated to have direct farce tracking capability. Neural network is used to compensate for all the uncertainties such as unknown robot dynamics, unknown environment stiffness, and unknown environment position. On line training signal of farce error for neural network is formulated. A large x-y table is built as a test-bed and neural network loaming algorithm is implemented on a DSP board mounted in a PC. Experimental studies of farce tracking on unknown environment for x-y table robot are presented to confirm the performance of the proposed technique.

• Journal of Institute of Control, Robotics and Systems
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• v.14 no.8
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• pp.745-751
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• 2008

This paper presents a framework for GPS/INS/Vision based navigation system of helicopters. GPS/INS coupled algorithm has weak points such as GPS blockage and jamming, while the helicopter is a speedy and high dynamical vehicle amenable to lose the GPS signal. In case of the vision sensor, it is not affected by signal jamming and also navigation error is not accumulated. So, we have implemented an GPS/INS/Vision aided navigation system providing the robust localization suitable for helicopters operating in various environments. The core algorithm is the vision based simultaneous localization and mapping (SLAM) technique. For the verification of the SLAM algorithm, we performed flight tests. From the tests, we confirm the developed system is robust enough under the GPS blockage. The system design, software algorithm, and flight test results are described.

• Journal of the Semiconductor & Display Technology
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• v.2 no.2
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• pp.9-15
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• 2003

This paper proposes a thickness measurement method of silicon-oxide and poly-silicon film deposited on 12" silicon wafer for spin etcher. Halogen lamp is used as a light source for generating a wide-band spectrum, which is guided and focused on the wafer surface through a optical fiber cable. Interference signal from the film is detected by optical sensor to determine the thickness of the film using spectrum analysis and several signal processing techniques including curve-fitting and adaptive filtering. Test wafers with three kinds of priori-known films, polysilicon(300 nm), silicon-oxide(500 nm) and silicon-oxide(600 nm), are measured while the wafer is spinning at 20 Hz and DI water flowing on the wafer surface. From experiment results the algorithm presented in the paper is proved to be effective with accuracy of maximum 0.8% error.rror.

• Proceedings of the KSR Conference
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• 2009.05a
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• pp.1473-1479
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• 2009

Recently, the high speed train was operated and then the train system's reliability requirements are growing more and more. The exact prediction simulation is necessary in the design of power feeding system by the increase of railway electrification. In order to develope the AC feeding system analysis technology, real-time power simulator was manufactured. It is composed to eight channels analog input, forty channels analog output and forty-eight channels digital I/O. The size of simulator rack is 19" and the two I/O boards are installed the PXI chassis built into the real time os. The signal I/O is possible through BNC connector. The test results of manufactured simulator are obtained that the error range of analog I/O signal is below 1 % and simulation condition is set to 1 ms and the simulation output of the analog output compares the results of the simulator.

• Communications for Statistical Applications and Methods
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• v.30 no.3
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• pp.311-330
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• 2023

The present work describes simulation studies to compare the performances in terms of averaged mean squared error of bayesian wavelet shrinkage methods in estimating component curves from aggregated functional data. Five bayesian methods available in the literature were considered to be compared in the studies: The shrinkage rule under logistic prior, shrinkage rule under beta prior, large posterior mode (LPM) method, amplitude-scale invariant Bayes estimator (ABE) and Bayesian adaptive multiresolution smoother (BAMS). The so called Donoho-Johnstone test functions, logit and SpaHet functions were considered as component functions and the scenarios were defined according to different values of sample size and signal to noise ratio in the datasets. It was observed that the signal to noise ratio of the data had impact on the performances of the methods. An application of the methodology and the results to the tecator dataset is also done.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2003.09a
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• pp.154-157
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• 2003

In order for testing faults of combinatorial logic circuit, the authors have developed a new diagnosis method: "Neural Network (NN) fault diagnosis", based on fm error back propagation functions. This method has proved the capability to test gate faults of wider range including so called SSA (single stuck-at) faults, without assuming neither any set of test data nor diagnosis dictionaries. In this paper, it is further shown that what kind of fault models can be detected in the NN fault diagnosis, and the simply modified one can extend to test delay faults, e.g. logic hazard as long as the delays are confined to those due to gates, not to signal lines.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.2193_2194
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• 2009

A digital over current relay(OCR) is realized by using TMS320C32 microprocessor. Fourier Transform is used to obtain the phasor of a current signal and a 2nd low pass filter is adopted to prevent aliasing error. H/W test shows almost same results with those of the S/W test. It could be possible that confirm simularity between H/W and S/W test in this paper.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.54 no.9
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• pp.531-538
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• 2005

This paper proposes an expert system which is able to enhance the accuracy and productivity by determining the test strategy based on heuristic rules for test of the hybrid electronic circuit board producted massively in production line. The test heuristic rules are obtained from test system designer, test experts and experimental results. The guarding method separating the tested device with circumference circuit of the device is adopted to enhance the accuracy of measurements in the test of analog devices. This guarding method can reduce the error occurring due to the voltage drop in both the signal input line and the measuring line by utilizing heuristic rules considering the device impedance and the parallel impedance. Also, PSA(Parallel Signature Analysis) technique Is applied for test of the digital devices and circuits. In the PSA technique, the real-time test of the high integrated device is possible by minimizing the test time forcing n bit output stream from the tested device to LFSR continuously. It is implemented in Visual C++ computer language for the purpose of the implementation of the inference engine using the dynamic memory allocation technique, the interface with the electronic circuit database and the hardware direct control. Finally, the effectiveness of the builded expert system is proved by simulating the several faults occurring in the mounting process the electronic devices to the surface of PCB for a typical hybrid electronic board and by identifying the results.

• Journal of the Korean Institute of Intelligent Systems
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• v.19 no.6
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• pp.773-778
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• 2009

This paper studied the training methods less affected by the emotional variation for the development of the robust speech recognition system. For this purpose, the effect of emotional variations on the speech signal were studied using speech database containing various emotions. The performance of the speech recognition system trained by using the speech signal containing no emotion is deteriorated if the test speech signal contains the emotions because of the emotional difference between the test and training data. In this study, it is observed that vocal tract length of the speaker is affected by the emotional variation and this effect is one of the reasons that makes the performance of the speech recognition system worse. In this paper, vocal tract normalization method is used to develop the robust speech recognition system for emotional variations. Experimental results from the isolated word recognition using HMM showed that the vocal tract normalization method reduced the error rate of the conventional recognition system by 41.9% when emotional test data was used.