• 제목/요약/키워드: Signal Conversion

검색결과 705건 처리시간 0.021초

Low Spurious Image Rejection Mixer for K-band Applications

  • Lee, Moon-Que;Ryu, Keun-Kwan;Kim, Hyeong-Seok
    • KIEE International Transactions on Electrophysics and Applications
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    • 제4C권6호
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    • pp.272-275
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    • 2004
  • A balanced single side-band (SSB) mixer employing a sub-harmonic configuration is designed for up and down conversions in K-band. The designed mixer uses anti-parallel diode (APD) pairs to effectively eliminate even harmonics of the local oscillator (LO) spurious signal. To reduce the odd harmonics of LO at the RF port, we employ a balanced configuration for LO. The fabricated chip shows 12$\pm$2dB of conversion loss and image-rejection ratio of about 20dB for down conversion at RF frequencies of 24-27.5GHz. As an up-conversion mode, the designed chip shows 12dB of conversion loss and image-rejection ratio of 20 ~ 25 dB at RF frequencies of 25 to 27GHz. The odd harmonics of the LO are measured below -37dBc.

위버구조 상향변환 혼합기의 스퓨리어스 신호 제거 방법 (A Novel Method for Rejection of the Spurious Signal in Weaver-Type Up-Conversion Mixer)

  • 김영완;송윤정;김유신;이창석
    • 한국전자파학회논문지
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    • 제15권7호
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    • pp.661-668
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    • 2004
  • 본 논문은 위버구조 low-IF 송신부를 구성하는 위버구조 혼합기의 출력단에 나타나는 스퓨리어스 신호를 제거하기 위한 방법을 제안한다. 스퓨리어스 신호는 고주파 혼합기를 사용한I/Q경로 신호의 이득 및 위상 부정합 그리고 I/Q신호를 위한 국부 발진기의 90$^{\circ}$ 위상 부정합에 의해 위버구조 혼합기의 출력단에 나타난다. 고주파 I/Q 경로 신호의 부정합은 스퓨리어스 신호로부터 진폭 부정합과 위상 부정합으로 유도되어 진폭 및 위상 부정합 정도에 의한 부호와 크기 함수로 검출하였다. 제안된 방법은 low-IF상향 혼합기의 출력단에 나타나는 송신 신호를 부정합 검출 회로의 고주파 혼합기에 공급하여 얻어지는 하향 변환된 기저대역 신호와 디지털 신호 처리부에서 수정된 기저 대역 신호와의 상관도를 구하여 진폭 및 위상 부정합을 보상하고 스퓨리어스 신호를 제거한다. 진폭 및 위상 부정합의 크기와 부호는 A/D 변환 후에 디지털 영역에서 독립적으로 결정되며, 부정합의 크기와 부호를 이용하여 디지털 신호 처리부에서 I/Q 경로 신호의 크기와 위상을 연속적으로 조절하여 스퓨리어스 신호를 제거한다. 본 논문에서는 수식적 해석과 성능 시뮬레이션 통하여 제안된 방법의 타당성을 검증하였다.

이중게이트 FET 를 이용한 광대역 하이브리드 믹서 설계 (Design of Broadband Hybrid Mixer using Dual-Gate FET)

  • 김철준;이강호;구경헌
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2005년도 추계종합학술대회
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    • pp.197-200
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    • 2005
  • This paper presents the design of a broadband hybrid mixer using dual-gate FET topology with a low-pass filter which improves return loss of output to isolate RF and LO signal. The low-pass filter shows the isolation whose RF and LO signal is better than 40 dBc at 2 GHz and 5 GHz band. The dual-gate mixer which has been designed by using cascade topology operates when the lower FET is biased in linear region and the upper FET is in saturation. The input matching circuit has been designed to have conversion gain from 2 GHz to 6 GHz. The designed mixer with low-pass filter shows the conversion gain of better than 7 dB from 2 GHz to 6 GHz at a low LO power level of 0 dBm with the fixed IF frequency of 21.4 MHz.

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압력센서의 디지털 인터페이스와 신호처리에 관한 연구 (A study on digital interface and signal process of pressure sensor)

  • 강형구;이종호;안광희;이충호;박찬원
    • 산업기술연구
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    • 제17권
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    • pp.95-101
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    • 1997
  • A smart pressure measurement system is described, which provides a precise A/D conversion and is highly suitable for communication with microprocessors. In order to avoid unstable problems of remote pressure sensing we have developed a new interface board which performs the A/D conversion and smart signal processing of the measured pressure data. Serial communication software which is based on ASCII code commands is also developed to process initial setup and calibration functions as well as multi-drop communication with PC. The test and evaluation of the proposed system has been shown as having the better performance compared to the other types of existing pressure measuring systems and will give good applications to the industrial use where a highly precision remote sensing is needed.

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An Integrated Approach for Position Estimation using RSSI in Wireless Sensor Network

  • Pu, Chuan-Chin;Chung, Wan-Young
    • Journal of Ubiquitous Convergence Technology
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    • 제2권2호
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    • pp.78-87
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    • 2008
  • Received signal strength indicator (RSSI) is used as one of the ranging techniques to locate dynamic sensor nodes in wireless sensor network. Before it can be used for position estimation, RSSI values must be converted to distances using path loss model. These distances among sensor nodes are combined using trilateration method to find position. This paper presents an idea which attempts to integrate both path loss model and trilateration as one algorithm without going through RSSI-distance conversion. This means it is not simply formulas combination but a whole new model was developed. Several advantages were found after integration: it is able to reduce processing load, and ensure that all values do not exceed the maximum range of 16-bit signed or unsigned numbers due to antilog operation in path loss model. The results also show that this method is able to reduce estimation error while inaccurate environmental parameters are used for RSSI-distance conversion.

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8비트 데이타 정밀도를 가지는 다층퍼셉트론의 역전파 학습 알고리즘 (Learning of multi-layer perceptrons with 8-bit data precision)

  • 오상훈;송윤선
    • 전자공학회논문지B
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    • 제33B권4호
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    • pp.209-216
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    • 1996
  • In this paper, we propose a learning method of multi-layer perceptrons (MLPs) with 8-bit data precision. The suggested method uses the cross-entropy cost function to remove the slope term of error signal in output layer. To decrease the possibility of overflows, we use 16-bit weighted sum results into the 8-bit data with appropriate range. In the forwared propagation, the range for bit-conversion is determined using the saturation property of sigmoid function. In the backwared propagation, the range for bit-conversion is derived using the probability density function of back-propagated signal. In a simulation study to classify hadwritten digits in the CEDAR database, our method shows similar generalization performance to the error back-propagation learning with 16-bit precision.

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새로운 리플 아날로그-디지털 변환기 (A New Ripple Analog-to-Digital Converter)

  • 차형우;정원섭
    • 대한전자공학회논문지
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    • 제27권8호
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    • pp.1255-1259
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    • 1990
  • A new ripple analog-to-digital converter (ADC) has been developed. It consists of two parallel ADCs and a switching network. The circuit operates on the analog input signal in two serial steps. First, a coarse conversion is made to determine the most significant bits by the first parallel ADC. The resultant bits control the switching network to connect a series resistor segment, within which the analog signal is contained, to the second parallel ADC. At second step, a fine conversion is made to determine the least significant bits by the second parallel ADC. The circuit requires 2(2\ulcorner\ulcorner1) comparators, 2(2\ulcorner\ulcorner resistors, and 2(2\ulcorner\ulcorner swithches for N-bit resolution.

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MZI를 이용한 전광 직렬-병렬 데이터 형식 변환기 구현과 활용 방안 (Implementation of All-Optical Serial-Parallel Data Converters Using Mach-Zehnder Interferometers and Applications)

  • 이성철
    • 디지털산업정보학회논문지
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    • 제7권2호
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    • pp.59-65
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    • 2011
  • All-optical signal processing is expected to offer advantages in speed and power consumption against over electronics signal processing. It has a potential to solve the bottleneck issues of ultra-high speed communication network nodes. All-optical serial-to-parallel and parallel-to-serial data converters would make it possible to easily process the serial data information of a high-speed optical packet without optical-to-electronic-to-optical data conversion. In this paper, we explain the principle of simple and easily expandable all-optical serial-to-parallel and parallel-to-serial data converters based on Mach-Zehnder interferometers. We experimentally demonstrate these data converters at 10Gbit/s serial data rate. They are useful all-optical devices for the all-optical implementations of label decoding, self-routing, control of variable packets, bit-wise logical operation, and data format conversion.

새로운 리플 아나로그-디지틀 변환기 (A New Ripple Analog - to - Digital Converter)

  • 정원섭
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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    • pp.571-573
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    • 1988
  • A new ripple analog-to-digital converter(ADC) has been developed. It consists of two parallel ADCs and a switching network. The circuit operates on the input signal in two serial steps. First a coarse conversion is made to determine the most significant bits by the first parallel ADC. The results control a switching network to connect the series resistor segment, the analog signal is contained within, to the second parallel ADC. At second step, a fine conversion is made to determine the least signification bits by the second parallel ADC. The circuit requires 2(2$\frac{N}{2}$) comparators, 2(2$\frac{N}{2}$) resistors, and 2(2$\frac{N}{2}$) switches for N-bit resolution.

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다중채널 A/D 변환 데이터획득시스템의 개발 (A Multi-Channel A/D Data Acquisition System)

  • 박찬원;이민섭;반윤호
    • 산업기술연구
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    • 제25권A호
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    • pp.183-189
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    • 2005
  • In precision instrumentation system, an A/D conversion of signal conditioning has some problems.; offset and drift errors with environmental situation. This paper suggested a development of the Multi-Channel A/D Data Acquisition System and a method of the evaluation and the temperature compensation for the A/D converters with the specific analog and digital circuit including the software. Also, we have designed a hardware and a software filters with smart algorithm for better signal processing of the proposed system. Software approach was adopted to obtain the stable data from A/D converter. As shown in our experimental works, the proposed system is expected to be used in the industrial field where a high precision measurement is required.

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