• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.3
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• pp.638-646
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• 2005

In recent wireless communications, direct conversion transceiver or If sampling SDR-based receivers have being designed as an alternative to conventional transceiver topologies. In direct conversion receiver a.chitectu.e, the 1.equency/phase offset between the RF input signal and the local oscillator signal is a major impairment factor even though the conventional AFC/APC compensates the service deterioration due to the offset. To rover the limited tracking range of the conventional method and effectively aid compensation scheme in terms of I/Q channel imbalances, the frequency/phase offset compensation in RF-front end signal stage is proposed in this paper. In RF-front end, the varying phase offset besides the fixed large frequency/phase offset are corrected by using early-late phase compensator. A more simple frequency and phase tacking function in digital signal processing stage of direct conversion receiver is effectively available by an ingenious frequency/phase offset tracking method in RF front-end stage.

• 전기의세계
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• v.17 no.2
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• pp.11-15
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• 1968

One of the most important methods used in the modern analysis of linear networks and systems is the signal flow graph technique, first introduced by S.J. Mason in 1953. In essence, the signal-flow graph technique is a graphical method of solving a set of simultaneous. It can, therefore, be regarded as an alternative to the substitution method or the conventional matrix method. Since a flow-graph is the pictorial representation of a set of equations, it has an obvious advantage, i.e., it describes the flow of signals from one point of a system to another. Thus it provides cause-and-effect relationship between signals. And it often significantly reduces the work involved, and also yields an easy, systematic manipulation of variables of interest. Mason's formula is very powerful, but it is applicable only when the desired quantity is the transmission gain between the source node and sink node. In this paper, author summarizes the signal-flow graph technique, and stipulates three rules for conversion of an arbitrary nonsource node into a source node. Then heuses the conversion rules to obtain various quantities, i.e., networks gains, functions and parameters, through simple graphical manipulations.

• Proceedings of the KIEE Conference
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• 1993.07a
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• pp.447-449
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• 1993

Digital filter is a signal processor which converts the sequence input sampled from analog signal into another sequence output. It includes software routines which filter digital signal, a computer system for executing the routines, and a data acquisition system which implements A/D, D/A signal conversion. In this paper, a data acquisition system is designed and implemented for one-board computer of MC68000. Also, the theory regarding signal conversion and and its problems occured in implementation are considered. And then, with the hardware implemented like this, design of a digital low-pass filter with the cutoff frequency of 200Hz is implemented, and related characteristics are considered.

• Journal of the Optical Society of Korea
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• v.20 no.4
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• pp.464-469
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• 2016

All-optical non-return-to-zero (NRZ) -to- return-to-zero (RZ) data-format conversion has been successfully demonstrated using a semiconductor optical amplifier in a fiber-loop mirror (so-called SOA-loop mirror) with a continuous-wave (CW) holding beam. The converted RZ signal after pulse compression has been used to create a 40 Gb/s OTDM (Optical Time Division Multiplexing) signal. Here is proposed an NRZ-to-RZ conversion method without any additional optical clocks, unlike conventional methods based on optical AND logic. In addition, it has the merit of operating at various bit-rate speeds without any controlling device. Moreover, it has a simple structure, and it can be used for all-optical bit-rate-flexible clock recovery.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.10 no.4
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• pp.105-113
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• 2010

In this paper, a 1.485 Gbps video signal transmission system using the carrier frequency of 240 GHz band was designed and simulated. The sub-harmonic mixer based on Schottky barrier diode was simulated in the transmitter and receiver. Both of heterodyne and direct detection receivers were simulated for each performance analysis. The ASK modulation was used in the transmitter and the envelop detection method was used in the receiver. The transmitter simulation results showed that the RF output power was -11.4 dBm($73{\mu}W$), when the IF input power was -3 dBm(0.5 mW) at the LO power of 7 dBm(5 mW) in sub-harmonic mixer, which corresponds to SSB(Single Side Band) conversion loss of 8.4 dB. This value is similar to the conversion loss of 8.0 dB(SSB) of VDI's commercial model WR3.4SHM(220~325 GHz) at 240 GHz. The combined transmitter and receiver simulation results showed that the recovered signal waveforms were in good agreement to the transmitted 1.485 Gbps NRZ signal.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.5
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• pp.480-485
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• 2004

In this paper, a new predistortion linearizing method using frequency up-conversion operation of mixer is proposed. This linearizing method doesn't require any additional signal sources in spite of frequency up-conversion mixing operation. This method extracts the 2nd low frequency intermodulation distortion signal from input signals and uses the extracted 2nd low frequency intermodulation distortion signal as mixing signal source. To show validation of the proposed predistortion method, we made K-PCS power amplifier. On 2-tone signals amplification process, the (C/I) ratio of amplifier is improved 26 ㏈ (@Po=22 ㏈m/tone), where two tones are 1.8544 ㎓ and 1.8556 ㎓, respectively. And (C/I) ratio is improved more than to 20 ㏈ for 17 ㏈ output signal dynamic range. On IS-95A CDMA 1FA amplification process, the improvements of adjacent channel power ratio(ACPR) are 10.8 ㏈ and 6.4 ㏈ at ${\pm}$885 ㎑ and ${\pm}$1.25 ㎒ offset points, respectively.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.12
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• pp.665-672
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• 2000

This paper described the measurement technology to analyze the partial discharge characteristics for long term aging of insulations. This system was consisted of high voltage generation and measurement part, PD detection part, digital conversion and signal processing part. We used the VXI system for digital conversion and signal processing part. In the digital conversion part, we studied the error of partial discharge magnitude and memory capacity for reading digital signal with the sampling rate. In the signal processing part, we showed the program algorithm to count pulses and read peak values of partial discharge. The allowable minimum sampling rate of digizer was decided to 250kS/s through analyzing test. We confirmed that this system was very useful in the study of $\phi-q-n$ characteristics of long term PD experiments with specimens being consisted of internal void defects and CIGRE II electrodes.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.11
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• pp.2391-2396
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• 2010

The power-controlled six-port element that can control the local oscillator signal power and receiving RF signal power was designed and implemented in this paper. The direct conversion six-port element configuration was proposed, which provides the constant six-port output power by controlling the six-port input power with various signal strength. The direct conversion six-port element protects the power detector element of six-port receiver from the saturation status and compensates the transmission performance degradation. For implementation of power-controlled six-port element, the power-controlled six-port element including the power controller was analyzed. The implemented power-controlled six-port element shows the power control capability of 36 dB and gain imbalance of about 1.6 dB, phase imbalance of about $4^{\circ}$ in the frequency range of 1.69 GHz. The measured results show the good performance as direct conversion front-end element.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2003.06a
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• pp.110-113
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• 2003

In this paper, the multi-channel high speed data acquisition system is implemented. This high speed signal processing system for 3-D image display is applicable to the manipulation of a medical image processing, multimedia data and various fields of digital image processing. In order to convert the analog signal into digital one, A/D conversion circuit is designed. PCI interface method is designed and implemented, which is capable of transmission a large amount of data to computer. In order to, especially, channel extendibility of images acquisition, bus communication method is selected. By using this bus method, we can interface each module effectively. In this paper, 32-channel A/D conversion and PCI interface system for 3-dimensional and real-time display of the retina image is developed. The 32-channel image acquisition system and high speed data transmission system developed in this paper is applicable to not only medical image processing as 3-D representation of retina image but also various fields of industrial image processing in which the multi-point realtime image acquisition system is needed.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.2
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• pp.114-118
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• 2006

In this paper, the effect of base and collector structures on DC, small signal characteristics of SiGe HBTs fabricated by RPCVD was investigated. The structure of SiGe HBTs was designed into four types as follows: SiGe HBT structures which are standard, apply extrinsic-base SEG selective epitaxial growth (SEG), apply selective collector implantation (SCI), and apply both extrinsic-base SEG and SCI. We verified the devices could be applied to the fabrication of RFIC chip through a fully integrated 2.4 GHz down-conversion mixer.