• Journal of Korea Multimedia Society
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• v.7 no.1
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• pp.35-43
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• 2004

In this paper, we proposed a vehicle recognition and electronic toll collection system with detection and classification of vehicle identification mark and emblem as well as recognition of vehicle license plate to unman toll fee collection system or incoming/outcoming vehicles to an institution. In the proposed algorithm, we first process pre-processing step such as noise reduction and thinning from the rear side input image of vehicle and detect vehicle mark, emblem and license plate region using intensity variation informations, template masking and labeling operation. And then, we classify the detected vehicle features regions into vehicle mark and emblem as well as recognize characters and numbers of vehicle license plate using hybrid and seven segment pattern vector. To show the efficiency of the proposed algorithm, we tested it on real vehicle images of implemented vehicle recognition system in highway toll gate and found that the proposed method shows good feature detection/classification performance regardless of irregular environment conditions as well as noise, size, and location of vehicles. And also, the proposed algorithm may be utilized for catching criminal vehicles, unmanned toll collection system, and unmanned checking incoming/outcoming vehicles to an institution.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.907-910
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• 2007

Recently, a container shipping volume has increased dramatically and continued on a trend of rapid growth, and so the number of container handled at the port increase. therefore, it's increasing about concern of harbor automatism to save distribution costs in harbor. harbor automatism classifies into four large automatism's, gate automatism by using RFID that trailer come with burdening the container to be loaded on ships go though with RFID and Quay-Side container crane automatism that treats cargos loading on ships and automatism of CG that loads containers from yard, and automatism of container transporters that carries containers in between gates. To increase the using efficiency of harbor, detecting exact location of yard crane is very important matter. In this paper, it intends to discuss about yard crane automatism applied UWB Ranging system and bring up the development direction.

• Journal of architectural history
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• v.29 no.1
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• pp.51-64
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• 2020

Southern Royal Villa served as an accommodation for the prince in early Joseon Dynasty, and as an official residence and banquet room for Chinese diplomats in the later period. It was facing south and was located at the southern part of the old town of Seoul and to the north of the Southern Gate. The place was divided into four parts: the outmost, the middle, the inner-middle and the inner part beginning from the south and with important buildings placed in the inner part. The residence for the first and the second highest diplomats was situated at the northernmost location. The residence for the highest diplomat was a two-story building. On the west side of the residence was the large scale Western Banquet Room. It consisted of a single wide hall suited for a grand ceremony, and had the greatest formality and solemnity. On the southwestern side of the diplomatic residence was a building which was called Momchae before the early 17th century and Namru(南樓) after the 19th century. Namru in the inner-middle part is the half-sized remnant of Momchae, which used to be the largest building in the Southern Royal Villa. The title 'Momchae (meaning Main Buildling)' signifies that the building represented the entire Villa when it was built as an accommodation for princes. The layout of the Villa in early Joseon Dynasty, which was centered around Momchae, is highly likely to have been a common structure of royal villa for princes during the period.

• Design & Manufacturing
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• v.16 no.4
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• pp.24-33
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• 2022

Fiber-reinforced plastics(FRPs) have excellent specific stiffness and strength, so they are usually used as automotive parts that require high rigidity and lightweight instead of metal. However, it is difficult to predict the mechanical properties of injection molded parts due to the fiber orientation and breakage of FRPs. In this paper, the fiber orientation characteristics and mechanical properties of injection molded specimens were evaluated in order to fabricate automotive transmission side covers with FRPs and design a rib structure for improvement of their rigidity. The test molds were designed and manufactured to confirm the fiber orientation characteristics of each position of the injection molded standard plate-shaped specimens, and the tensile properties of the specimens were evaluated according to the injection molding conditions and directions of specimens. A gusset-rib structure was designed to improve the additional structural rigidity of the target products, and a proper rib structure was selected through the flexural tests of the rib-structured specimens. Based on the evaluation of fiber orientation and mechanical characteristics, the optimization analyses of gate location were performed to minimize the warpage of target products. Also, the deformation analyses against the internal pressure of target product were performed to confirm the rigidity improvement by gusset-rib structure. As a result, it could be confirmed that the deformation was reduced by 27~37% compared to the previous model, when the gusset-rib structure was applied to the joining part of the target products.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.2
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• pp.185-190
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• 2016

A 70-${\AA}$ nanowire field-effect transistor (FET) for sub-10-nm CMOS technology is designed and simulated in order to investigate the impact of an oxide trap on random telegraph noise (RTN) in the device. It is observed that the drain current fluctuation (${\Delta}I_D/I_D$) increases up to a maximum of 78 % due to the single electron trapping. In addition, the effect of various trap positions on the RTN in the nanowire FET is thoroughly analyzed at various drain and gate voltages. As the drain voltage increases, the peak point for the ${\Delta}I_D/I_D$ shifts toward the source side. The distortion in the electron carrier density and the conduction band energy when the trap is filled with an electron at various positions in the device supports these results.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.163-163
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• 2015

The effect of nematic liquid crystal(5CB-4-Cyano-4'-pentylbiphenyl) on the amorphous indium gallium zinc oxide thin film transistors(a-IGZO TFTs) was investigated. Through dropping the 5CB on the a-IGZO TFT's channel layer which is deposited by RF-magnetron sputtering, properties of a-IGZO TFTs was dramatically improved. When drain bias was induced, 5CB molecules were oriented by Freedericksz transition generating positive charges to one side of dipoles. From increment of the capacitance by orientation of liquid crystals, the drain current was increased, and we analyzed these phenomena mathematically by using MOSFET model. Transfer characteristic showed improvement such as decreasing of subthreshold slope(SS) value 0.4 to 0.2 and 0.45 to 0.25 at linear region and saturation region, respectively. Furthermore, in positive bias system(PBS), prevention effect for electron trapping by 5CB liquid crystal dipoles was observed, which showing decrease of threshold voltage shift [(${\delta}V$]_TH) when induced +20V for 1~1000sec at the gate electrode.

• Journal of information and communication convergence engineering
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• v.14 no.1
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• pp.40-44
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• 2016

The device coupling between the stacked top/bottom field-effect transistors (FETs) in two types of monolithic 3D inverter (M3INV) with/without a metal layer in the bottom tier is investigated, and then the regime of the thickness T_ILD and dielectric constant ε_r of the inter-layer distance (ILD), the doping concentration N_d (N_a), and length L_g of the channel, and the side-wall length L_SW where the stacked FETs are coupled are studied. When N_d (N_a) < 10¹⁶ cm^-3 and L_SW < 20 nm, the threshold voltage shift of the top FET varies almost constantly by the gate voltage of the bottom FET, but when N_d (N_a) > 10¹⁶ cm^-3 or L_SW > 20 nm, the shift decreases and increases, respectively. M3INVs with T_ILD ≥ 50 nm and ε_r ≤ 3.9 can neglect the interaction between the stacked FETs, but when T_ILD or ε_r do not meet the above conditions, the interaction must be taken into consideration.

• Journal of the Korean Institute of Educational Facilities
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• v.11 no.4
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• pp.15-24
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• 2004

The purpose of this study is to suggest some alternative on site planning of elementary school through investigating the effects of geographical and urban environment on the site. For this, we selected and surveyed 35 schools in Gwangju. The results of this study are as follows. 1) We cannot find out the differences from the use of elementary schools sites on slopes of sites. However, the sunken space between H type buildings in the site slopes facing east or west and the placing the playground on the north side of the site slopes facing north have some problems 2) The number of adjacent road and surrounding environment didn't show any effect. To separate between cars and pedestrians, we need some plans to block cars on the pedestrian gateway and it is much better to intensify the parking area near the school gate that cars come in and out. 3) The degree of satisfaction on the outdoor facilities of these cases shows low level. Therefore, to use the site of schools efficiently, we should secure the spacious playground and make plans to provide some spaces around school building for the static activities of students and teachers. 4) Most of all, the site which is suitable for educational environment should be selected. and also Special Code on the urban plan should be established to develop this one.

• Journal of Power Electronics
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• v.17 no.1
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• pp.242-252
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• 2017

This paper deals with the blocking of DC-fault current during DC cable short-circuit conditions in HVDC (High-Voltage DC) transmission systems utilizing Modular Multilevel Converters (MMCs), where a new SubModule (SM) topology circuit for the MMC is proposed. In this SM circuit, an additional Insulated-Gate Bipolar Translator (IGBT) is required to be connected at the output terminal of a conventional SM with a half-bridge structure, hereafter referred to as HBSM, where the anti-parallel diodes of additional IGBTs are used to block current from the grid to the DC-link side. Compared with the existing MMCs based on full-bridge (FB) SMs, the hybrid topologies of HBSM and FBSM, and the clamp-double SMs, the proposed topology offers a lower cost and lower power loss while the fault current blocking capability in the DC short-circuit conditions is still provided. The effectiveness of the proposed topology has been validated by simulation results obtained from a 300-kV 300-MW HVDC transmission system and experimental results from a down-scaled HVDC system in the laboratory.

• Transactions on Electrical and Electronic Materials
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• v.15 no.3
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• pp.149-154
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• 2014

A new CMOS analog design methodology using an independently optimized self-cascode (SC) is proposed. This idea is based on the concept of the dual-workfunction-gate MOSFETs, which are equivalent to SC structures. The channel length of the source-side MOSFET is optimized, to give higher transconductance ($g_m$) and output resistance ($r_{out}$). The highest $g_m$ and $r_{out}$ of the SC structures are obtained by independently optimizing the channel length ratio of the SC MOSFETs, which is a critical design parameter. An operational amplifier (OPAMP) with the proposed design methodology using a standard digital $0.18-{\mu}m$ CMOS technology was designed and fabricated, to provide better performance. Independently $g_m$ and $r_{out}$ optimized SC MOSFETs were used in the differential input and output stages, respectively. The measured DC gain of the fabricated OPAMP with the proposed design methodology was approximately 18 dB higher, than that of the conventional OPAMP.