• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2012.05a
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• pp.338-339
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• 2012

This study examined the friction and wear behavior of diamond-like carbon (DLC) films deposited from a radio frequency glow discharge using a hydrogen diluted benzene gas mixture. The DLC films were deposited on Si (100) and polished stainless steel substrates by r.f.-PACVD at hydrogen to benzene ratios, or the hydrogen dilution ratio, ranging from 0 to 2.0. The wear test was carried out in both ambient and aqueous environments using a home-made ball-on-disk type wear rig. The stability of the DLC coating in an aqueous environment was improved by diluting the benzene precursor gas with hydrogen, suggesting that hydrogen dilution during the deposition of DLC films suppress the initiation of defects in the film and improved the adhesion of the coating to the interface.

• Journal of the Korean Magnetics Society
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• v.17 no.2
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• pp.95-98
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• 2007

In this paper, the magnetic properties and the annealing behavior of spin valve structures with Mo(MoN) underlayers were studied for various underlayer thickness. The spin valve structure was Si substrate/Mo(MoN)$(t{\AA})/NiFe(21{\AA})/CoFe(28{\AA})/Cu(22{\AA})/CoFe(18{\AA})/IrMn(65{\AA})/Ta(25 {\AA})$. Mo and MoN films were deposited on Si substrates and their thermal annealing behavior was analyzed. The deposition rate of the MoN thin film was decreased and tile resistivity of the MoN thin films were increased as the $N_2$ gas flow was increased. The variations of MR ratio and magnetic exchange coupling field of spin valve structure were smaller with MoN underlayers than that with Mo underlayers up to thickness of $51{\AA}$. MR ratio of spin valves with Mo underlayers was 2.86% at room temperature and increased up to 2.91 % after annealing at $200^{\circ}C$. Upon annealing at $300^{\circ}C$, the MR ratio decreased about 2.16%. The MR ratio of spin valves structure with MoN underlayers for $N_2$ gas flow 1 sccm was 5.27% at room temperature and increased up to 5.56% after annealing at $200^{\circ}C$. Upon annealing at $300^{\circ}C$, the MR ratio decreased about 4.9%.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.1
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• pp.72-78
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• 1998

Polarization mode converters have been produced by utilizing Ti:LiNbO$_{3}$ channel waveguide and strain-optic effect. Shear strain for periodic perturbations of optical channel waveguides and phase matching can be obtained by an evaporated periodic SiO$_{2}$ thin film at 300.deg. C. The electrodes located on the either side of waveguide provide a means to electro-optically tune the wavelength for maximum polarization conversion via the electrooptic effect. The maximum conversion effeciency was observed at 21.deg. C for V=0 and 46.deg. C for V=30V aro the device having 7 .mu.m waveguide wiith and 350 periodic pads. The dependence of the number of pads on conversion efficiency was observed experimentally.fficiency was observed experimentally.

• Macromolecular Research
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• v.10 no.2
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• pp.75-79
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• 2002

Organic materials have considerable attention as active semiconductors for device applications such as thin-film transistors (TFTs) and diodes. Pentacene is a p-type organic semiconducting material investigated for TFTs. In this paper, we reported the morphological and electrical characteristics of pentacene TFT films. The pentacene transistors showed the mobility of 0.8 $\textrm{cm}^2$/Vs and the grains larger than 1 ${\mu}{\textrm}{m}$. Deep-level transient spectroscopy (DLTS) measurements were carried out on metal/insulator/organic semiconductor structure devices that had a depletion region at the insulator/organic-semiconductor interface. The duration of the capacitance transient in DLTS signals was several ten of seconds in the pentacene, which was longer than that of inorganic semiconductors such as Si. Based on the DLTS characteristics, the energy levels of hole and electron traps for the pentacene films were approximately 0.24, 1.08, and 0.31 eV above Ev, and 0.69 eV below Ec.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.12
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• pp.560-564
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• 2006

ZnO thin films were prepared by RF magnetron sputter deposition on p-Si(100) wafer with various cooling rates of substrate temperature such as the substrates were pre-heated to $400^{\circ}C$ before the deposition and then cooled down naturally or slowly to $300^{\circ}C,\;200^{\circ}C,\;100^{\circ}C$, and R.T. by the temperature controller during the deposition. Crystalline and micro-structural characteristics of the films were investigated by XRD and SEM. ZnO films which cooled down naturally or slowly by the temperature controller during the deposition, especially the film were deposited with cooling down from $400^{\circ}C\;to\;200^{\circ}C$ slowly. showed the most outstanding c-axis preferred orientation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.6
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• pp.1099-1103
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• 2007

TFT's have been intensively researched for possible electronic and display applications. Through tremendous engineering and scientific efforts, a-Si:H TFT fabrication process was greatly improved. In this paper, the reason on defects occurring at a-Si:H TFT fabrication process is analyzed and solved, so a-Si:H TFT's yield is increased and reliability is improved. The a-Si:H TFT of this paper is inverted staggered type TFT. The gate electrode is formed by patterning with length of $8{\mu}m{\sim}16{\mu}m$ and width of $80{\sim}200{\mu}m$ after depositing with gate electrode (Cr). We have fabricated a-SiN:H, conductor, etch-stopper and photo-resistor on gate electrode in sequence, respectively. We have deposited n+a-Si:H, NPR(Negative Photo Resister) layer after forming pattern of Cr gate electrode by etch-slower pattern. The NPR layer by inverting pattern of upper Sate electrode is patterned and the n+a-Si:H layer is etched by the NPR pattern. The NPR layer is removed. After Cr layer is deposited and patterned, the source-drain electrode is formed. The a-Si:H TFT made like this has problems at photo-lithography process caused by remains of PR. When sample is cleaned, this remains of PR makes thin chemical film on surface and damages device. Therefor, in order to improve this problem we added ashing process and cleaning process was enforced strictly. We can estimate that this method stabilizes fabrication process and makes to increase a-Si:H TFT's yield.

• International Journal of Automotive Technology
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• v.2 no.3
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• pp.85-91
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• 2001

Characteristics of methane direct-injection spark-ignition stratified combustion in lean hydrogen mixture were analyzed both in a single cylinder engine and in a constant volume combustion chamber. Combustion pressure and Instantaneous combustion chamber wall temperature during the combustion process were measured with a thin-film thermocouple and used in analyses of combustion and cooling loss. Results in this research show that the premixed hydrogen increases cooling loss to combustion chamber wall while achieving combustion promotion, and the combustion system is effective especially in lean mixture conditions. Analysis of flame propagation was also done with Schlieren photography in the constant volume combustion chamber.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.11a
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• pp.137-140
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• 1998

An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate si후미 distortion and pixel charging capability. which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the resistivity of gate line material on the pixel operations can be effectively analyzed. The gate signal delay, pixel charging ratio and level-shift of the pixel voltage were simulated with varying the parameters. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

• Korean Journal of Materials Research
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• v.8 no.1
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• pp.85-91
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• 1998

인이 높은 농도로 도핑되어진 LPCVD 다결정 실리콘 박막의 열팽창 계수를 마이크로 게이지법을 이용하여 측정하였다. 기존의 박막의 열팽창 계수 측정 법에서는 박막이 기판에 증착되어진 상태에서 측정이 이루어지므로, 기판의 탄성계수와 열팽창계수를 미리 알고 있어야 한다. 이에 비해 마이크로 게이지법에서는 박막의 열\ulcorner창 계수를 도출하기 위하여 기판의 탄성계수 값과 열팽창 계수 값을 필요로 하지 않는다는 장점이 있다. 마이크로 게이지법에서는 전류를 가할 경우 줄 발열에 의해 발생한 마이크로 게이지에의 변위를 측정하고, 그 때 계산된 마이크로 게이지의 평균 온도의 관계에서 열팽창 계수를 계산한다. 다결정 실리콘 박막의 열팽창 계수는 2.9 x $10^{-6}$$^{\circ}C$로 측정되었으며, 이 값들의 표준편차는 0.24x$10^{-6}$$^{\circ}C$였다.

• Journal of Information Display
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• v.6 no.3
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• pp.12-17
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• 2005

The need for low cost, flexible, thin film transistor (TFT) display backplanes has focused attention on new processing techniques and materials. We report the development of TFT backplane technology based entirely on jet-printing, using a combination of additive and subtractive processing, to print active materials or etch masks. The technique eliminates the use of photolithography and has the potential to reduce the array manufacturing cost. The printing technique is demonstrated with both amorphous silicon and polymer semiconductor TFT arrays, and we show results of small prototype displays.