• 한국재료학회지
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• 제4권1호
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• pp.81-89
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• 1994

전자빔 증착법을 사용하여 10nm두께의 Ti과 18nm두께의 Co를 Si(100)기판에 증착한 후, $N_{2}$분위기에서 $900^{\circ}C$, 20초 급속 열처리하여, Co/Ti 이중금속박막의 역전을 유도함으로서 $CoSi_{2}$박막을 형성하였다. 4점 탐침기로 측정한 면저항은 3.9Ω/ㅁ 었으며, 열처리 시간을 증가해도 이값은 유지하여 열적 안정성을 나타내었다. XRD 결과는 형성된 실리사이드는 기판과 에피관계를 갖는 $CoSi_{2}$상 임을 보였으며, SEM 사진은 평탄한 표면을 나타내었다. 단면 TEM 사진은 기판위에 형성된 박막층은 70nm 두께의 $CoSi_{2}$ 에피박막과 그위에 두개의 C0-Ri-Si합금층등 세개의 층으로 되어 있음을 보였다. AES 분석은, 기판상의 자연산화막을 형성할 수 있었음을 보여주었다. AES분석은, 기판상의 잔연산화막이 열처리초기, Ti에 의해 제거된후 Co가 원자적으로 깨끗한 Si기판에 확산하여 $CoSi_{2}$에피박막을 형성할 수 있었음을 보여주었다. $700^{\circ}C$, 20초 + $900^{\circ}C$, 20초 이중 열처리를 한 경우, $CoSi_{2}$결정성장으로 면저항값은 약간 낮아졌으나, 박막의 표면과 계면이 거칠었다. 이 $CoSi_{2}$에피박막의 실제 소자에의 적용방안과 막의 역전을 통한 에피박막형성의 기제를 열역학 및 kinetics 관점에서 고찰하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.195-196
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• 2009

This paper describes the fabrication and characteristics of polycrystalline 3C-SiC thin film diodes for extreme environment applications, in which the this thin film was deposited onto oxidized Si wafers by APCVD using HMDS In this work, the optimized growth temperature and HMDS flow rate were $1,100^{\circ}C$ and 8sccm, respectively. A Schottky diode with a Au, Al/poly 3C-SiC/$SiO_2$/Si(n-type) structure was fabricated and its threshold voltage ($V_d$), breakdown voltage, thickness of depletion layer, and doping concentration ($N_D$) values were measured as 0.84V, over 140V, 61nm, and $2.7{\times}10^{19}cm^2$, respectively. To produce good ohmic contact, Al/3C-SiC were annealed at 300, 400, and $500^{\circ}C$ for 30min under a vacuum of $5.0{\times}10^{-6}$Torr. The obtained p-n junction diode fabricated by poly 3C-SiC had similar characteristics to a single 3C-SiC p-n junction diode.

• 한국전기전자재료학회논문지
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• 제27권5호
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• pp.282-285
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• 2014

We have investigated the structural and electrical properties of Si-Zn-Sn-O (SZTO) thin films deposited by RF magnetron sputtering at various deposition temperatures from RT to $350^{\circ}C$. All the SZTO thin fims are amorphous structure. The mobility of SZTO thin film has been changed depending on the deposition temperature. SZTO thin film transistor shows mobility of 8.715 $cm^2/Vs$ at room temperature. We performed the electrical stress test by applying gate and drain voltage. SZTO thin film transistor shows good stability deposited at room temperature while showing poor stability deposited at $350^{\circ}C$. As a result, the electrical performance and stability have been changed depending on deposition temperature mainly because high deposition temperature loosened the amorphous structure generating more oxygen vacancies.

• E2M - 전기 전자와 첨단 소재
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• 제9권3호
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• pp.251-258
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• 1996

Sol-Gel derived ferroelectric Pb(Z $r_{0.52}$ $Ti_{0.48}$) $O_{3}$ thin films have been fabricated on Pt/Ti/ $SiO_{2}$/Si substrate. Two kinds of fast annealing methods, F-I (six times of intermediate and final annealing) and F-II(one final annealing after six times of intermediate annealing) were used for preparation of multi-coated PZT thin films. As the annealing temperature was increased, high capacitance could be obtained, for instance, 2700.angs.-thick PZT thin film annealed at 680.deg. C had a capacitance value of approximately 20nF at 1kHz. In addition, it is found that the dielectric constant is a function of the perovskite phase fraction. In case of F-I method, PZT thin film had a remanent polarization(Pr) of 8-15.mu.C/c $m^{2}$ and a coercive field( $E_{c}$) of 35-44kV/cm according to annealing temperature, whereas PZT film fabricated by F-II method had as high as 24-25.mu.C/c $m^{2}$ and 48-59kV/cm, respectively. As a result of measuring Curie temperature, PZT thin film had a range of 460-480.deg. C by F-I method and more or less higher range of 525-530.deg. C by F-II method, which implied that different microstructures could cause the different Curie temperature. Through I-V measurement, leakage current of PZT thin film fabricated by F-I and F-II methods was 64nA/c $m^{2}$ and 2.2.mu.A/c $m^{2}$ in the electric field of 100kV/cm, respectively.y.y.y.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 추계학술대회 논문집
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• pp.217-220
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• 2000

The SrBi$_2$Ta$_2$O$\_$9/(SBT) thin films are deposited on Pt-coated electrode(Pt/TiO$_2$/SiO$_2$/Si) using RF sputtering method. The SBT thin films deposited on substrate at 400-500[$^{\circ}C$]. SBT thin film deposited on Pt-coated electrodes have the cubic perovskite structure and polycrystalline state. With increasing annealing temperature from 600[$^{\circ}C$] to 850[$^{\circ}C$], flourite phase was crystallized to 650[。 and Bi-layered perovskite phase was crystallize ed above 700[$^{\circ}C$]. The maximum remnant polarization and the coercive electric field is 11.73[${\mu}$C/$\textrm{cm}^2$], 85[kV/cm] respectively at annealing temperature of 750[$^{\circ}C$]. The fatigue characteristics of SBT thin films deposited on Pt/TiO$_2$/SiO$_2$/Si substrate did not change up to 10$\^$10/ switching cycles.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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• pp.170-171
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• 2006

The chemical shift of SiOC film was observed according to the flow rate ratio. SiOC film has the broad main band of $880{\sim}1190cm^{-1}$ and the sharp Si-$CH_3$ bond at $1252cm^{-1}$, and the infrared spectra in the Si-O-C bond moved to low frequency according to the increasing of an oxygen flow rate. The chemical shift affected the carbon content in the SiOC film, and the decreasing of carbon atoms elongated the C-H bonding length, relatively. The main bond without the sharp Si-$CH_3$ bond at $1252cm^{-1}$ consisted of Si-C, C-O and Si-O bonds, and became the bonding structure of the Si-O-C bond.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집 Vol.3 No.2
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• pp.1057-1059
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• 2002

ZnO-Si-ZnO multi-layer thin films have been deposited by pulsed laser deposition (PLD). And then, the films have been annealed at $300^{\circ}C$ in oxygen ambient pressure. Electrical properties of the films were improved slightly than ZnO thin film without Si layer. Also, the optical and structural properties changed by Si layer in ZnO thin film. The optical and structural properties of Si-doped ZnO thin films were characterized by PL(Photoluminescence) and XRD(X-ray diffraction method) respectively. Electrical properties were measured by van der Pauw Hall measurements.

• 한국진공학회지
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• 제12권2호
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• pp.130-135
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• 2003

최근, poly-Si 박막은 저가의 박막소자응용을 위하여 사용되어 왔다. 그러나, 유리기판 위에서 일반적인 고상결정화(SPC) 방식으로 poly-Si 박막을 얻기는 불가능하다. 이러한 단점 때문에 유리와 같은 저가기판 위에 poly-Si을 결정화하는 연구가 최근 다양하게 진행되고 있다. 본 논문에서는 급속열처리(RTA)를 이용하여 유연한 기판인 몰리브덴 기판 위에서 a-Si:H를 성장시킨 후 고온결정화에 대한 연구를 진행하였다 고온결정화된 poly-Si 박막은 150$\mu\textrm{m}$ 두께의 몰리브덴 기판 위에 성장되었으며 결정화 온도는 고 진공하에서 $750^{\circ}C$~$1050^{\circ}C$ 사이에서 결정화된 시료에 대하여 결정화도, 결정화 면방향, 표면구조 및 전기적 특성이 조사되었다. 결정화온도 $1050^{\circ}C$에서 3분간 결정화된 시료의 결정화도는 92%를 나타내고 있었다. 결정화된 poly-Si 박막으로 제작된 TFT 소자로부터 전계효과 이동도 67 $\textrm{cm}^2$/Vs을 얻을 수 있었다.

• 반도체디스플레이기술학회지
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• 제18권2호
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• pp.29-31
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• 2019

The ZTO/p-Si thin film was produced and investigated for tunneling phenomena caused by the interface characteristics of the depletion layer. ZTO thin film was deposited and heat treated to produce barrier potentials by the depletion layer. The negative resistance characteristics were shown in the thin film of ZTO heat treated at $100^{\circ}C$, and the insulation properties were the best. Current decreased in the negative voltage direction by nonlinear show key characteristics, and current decreased in tunneling phenomenon by negative resistance in the positive voltage direction. Heat treated at $100^{\circ}C$, the ZTO thin film has increased barrier potential in the areas of the depletion layer and therefore the current has increased rapidly. The current has decreased again as we go beyond the depletion layer. Therefore, tunneling can be seen to make insulation better. In the ZTO thin film heat treated at $70^{\circ}C$ without tunneling, leakage current occurred as current increased at positive voltage. Therefore, tunneling effects by negative resistance were found to enhance insulation properties electrically.

• 센서학회지
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• 제6권6호
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• pp.483-490
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• 1997

Thin film Si has been used in sensors, radiation detectors, and solar cells. The carrier mobility of thin film Si influences the device behavior through its frequency response or time response. Since poly-Si shows the higher mobility value, a-Si:H films on Mo substrate were subjected to various crystallization treatments. Consequently, we need to find an appropriate method in mobility measurement before and after the anneal treatment. This paper investigates the carrier mobility improvement with anneal treatments and summarizes the mobility measurement methods of the a-Si:H and poly-Si film. Various techniques were investigated for the mobility determination such as Hall mobility, HS, TOF, SCLC, TFT, and TCO method. We learned that TFT and TCO method are suitable for the mobility determination of a-Si:H and poly-Si film. The measured mobility was improved by $2{\sim}3$ orders after high temperature anneal above $700^{\circ}C$ and grain boundary passivation using an RF plasma rehydrogenation.