• Journal of the Korean Crystal Growth and Crystal Technology
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• v.32 no.4
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• pp.121-127
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• 2022

β-Gallium oxide (Ga₂O₃), an ultra-wide bandgap semiconductor, has attracted great attention due to its promising applications for high voltage power devices. The most stable phase among five different polytypes, β-Ga₂O₃ has the wider bandgap of 4.9 eV and higher breakdown electric field of 8 MV/cm. Furthermore, it can be grown from melt source, implying higher growth rate and lower fabrication cost than other wide bandgap semiconductors such as SiC, GaN and diamond for the power device applications. In this study, β-Ga₂O₃ bulk crystals were grown by the edge-defined film-fed growth (EFG) process. The growth direction and the principal surface were set to be the [010] direction and the (100) plane of the β-Ga₂O₃ crystal, respectively. The spectra measured by Raman an alysis could exhibit the crystal phase an d impurity dopin g in the β-Ga₂O₃ ingot, and the crystallinity quality and crystal direction were analyzed using high-resolution X-ray diffraction (HRXRD). The crystal quality and various properties of as-grown β-Ga₂O₃ ribbon was systematically analyzed in order to investigate the spatial variation in entire crystal grown by EFG method.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.34 no.1
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• pp.1-7
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• 2024

β-Ga₂O₃ is a material with a wide band gap of ~4.8 eV and a high breakdown-voltage of 8 MV/cm, and is attracting much attention in the field of power device applications. In addition, compared to representative WBG semiconductor materials such as SiC, GaN and Diamond, it has the advantage of enabling single crystal growth with high growth rate and low manufacturing cost [1-4]. In this study, we succeeded in growing a 10 mm thick β-Ga₂O₃ single crystal doped with 0.3 mol% SnO₂ through the EFG (Edge-defined Film-fed Growth) method using multi-slit structure. The growth direction and growth plane were set to [010]/(010), respectively, and the growth speed was about 12 mm/h. The grown β-Ga₂O₃ single crystal was cut into various crystal planes (010, 001, 100, ${\bar{2}}01$) and surface processed. The processed samples were compared for characteristics according to crystal plane through analysis such as XRD, UV/VIS/NIR/Spec., Mercury Probe, AFM and Etching. This research is expected to contribute to the development of power semiconductor technology in high-voltage and high-temperature applications, and selecting a substrate with better characteristics will play an important role in improving device performance and reliability.

• Journal of Sensor Science and Technology
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• v.6 no.1
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• pp.63-71
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• 1997

The thin-film eletroluminescent (TFEL) device having the stacked structure of ZnS:Mn/$ZnS:TbF_{3}$ has been fabricated. Insulate layers used (Pb,La)$TiO_{3}$ and $SiO_{2}$ thin films. The emission color was white. The TFEL device employing ZnS:Mn/$ZnS:TbF_{3}(8000{\AA})$ stacked phosphor layers showed the threshold voltage of $78V_{rms}$. And the brightness of the TFEL device was $400{\mu}W/cm^{2}$ at the applied voltage of $100V_{rms}$. The emission spectrum of TFEL device had a wavelength from 450nm to 620nm. The manufactured devices can be a practical use as a TFEL devices of red, green and blue by using the color filters.

• Journal of the Korean Vacuum Society
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• v.13 no.1
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• pp.22-28
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• 2004

Ta films were deposited on Si (100) substrates at zero substrate bias voltage and a substrate bias voltage of -125 V ($V_{s}$ = -125 V) using a non-mass separated ion beam deposition system. To investigate the effect of the negative substrate bias voltage on the impurity concentration in the Ta films, secondary ion mass spectrometry (SIMS) was used to determine impurities in the Ta films. By the SIMS depth profiles with $Cs^{+}$ cluster ion beam, high intensities of O, C and Si were clearly found in the Ta film at $V_{s}$ = 0 V, whereas these impurities remarkably decreased in the Ta film at $V_{s}$ = -125 V. Furthermore, from the SIMS result with $Cs^{+}$ and $O_2^{+}$ ion beams, it was found that applying the negative substrate bias voltage could affect individual impurity contents in the Ta films during the deposition. Discussions concerning the effect of the negative substrate bias voltage on the impurity concentration of Ta films will be described in details.

• Transactions on Electrical and Electronic Materials
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• v.12 no.5
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• pp.193-196
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• 2011

Lead zirconate titanate (PZT)/ bismuth ferrite (BFO) multilayer thin films have been fabricated by the spin-coating method on Pt(200 nm)/Ti(10 nm)/$SiO_2$(100 nm)/p-Si(100) substrates using $BiFeO_3$ and $Pb(Zr_{0.52}Ti_{0.48})O_3$ metal alkoxide solutions. The PZT/BFO multilayer thin films show a uniform and void-free grain structure, and the grain size is smaller than that of PZT single films. The reason for this is assumed to be that the lower BFO layers play an important role as a nucleation site or seed layer for the formation of homogeneous and uniform upper PZT layers. The dielectric constant and dielectric losses decreased with increasing number of coatings, and the six-layer PZT/BFO thin film has good properties of 162 (dielectric constant) and 0.017 (dielectric losses) at 1 kHz. The remnant polarization and coercive field of three-layer PZT/BFO thin films were 13.86 ${\mu}C/cm^2$ and 37 kV/cm respectively.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.470-470
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• 2013

Recently, active materials such as amorphous silicon (a-Si), poly crystalline silicon (poly-Si), transition metal oxide semiconductors (TMO), and organic semiconductors have been demonstrated for flexible electronics. In order to apply flexible devices on the polymer substrates, all layers should require the characteristic of flexibility as well as the low temperature process. Especially, pentacene thin film transistors (TFTs) have been investigated for probable use in low-cost, large-area, flexible electronic applications such as radio frequency identification (RFID) tags, smart cards, display backplane driver circuits, and sensors. Since pentacene TFTs were studied, their electrical characteristics with varying single variable such as strain, humidity, and temperature have been reported by various groups, which must preferentially be performed in the flexible electronics. For example, the channel mobility of pentacene organic TFTs mainly led to change in device performance under mechanical deformation. While some electrical characteristics like carrier mobility and concentration of organic TFTs were significantly changed at the different temperature. However, there is no study concerning multivariable. Devices actually worked in many different kinds of the environment such as thermal, light, mechanical bending, humidity and various gases. For commercialization, not fewer than two variables of mechanism analysis have to be investigated. Analyzing the phenomenon of shifted characteristics under the change of multivariable may be able to be the importance with developing improved dielectric and encapsulation layer materials. In this study, we have fabricated flexible pentacene TFTs on polymer substrates and observed electrical characteristics of pentacene TFTs exposed to tensile and compressive strains at the different values of temperature like room temperature (RT), 40, 50, $60^{\circ}C$. Effects of bending and heating on the device performance of pentacene TFT will be discussed in detail.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.60.2-60.2
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• 2011

본 연구에서는 Indium-free 및 gallium-free 기반의 산화물 TFT를 제작하기 위해 n-type $TiO_2$ 반도체 기반의 thin film transistor ($Mo/TiO_{2-x}/SiO_2/p+\;+Si$)를 oxygen deficient black $TiO_{2-x}$ 타겟을 이용하여 DC magnetron sputtering 공법으로 제작하고 그 특성을 분석하였다. DC magnetron sputtering 공법으로 성막된 $TiO_{2-x}$ semiconductor의 전기적, 광학적, 화학적 결합 에너지 및 구조적 특성 분석을 위해 semiconductor parameter analyzer (Aglient 4156-C), UV/Vis spectrometer, X-ray Photoelectron Spectroscopy, Transmission Electron Microscopy를 각각 이용하여 분석하였으며 이를 RTA 전/후 특성 비교를 통하여 관찰하였다. $TiO_{2-x}$ TFT의 소자 특성은 RTA 열처리 전/후 전형적인 insulator 특성에서 semiconductor 특성으로 변화되는 것을 관찰할 수 있었으며, 최적화된 열처리 공정에서 filed effect mobility 0.69 $cm^2$/Vs, on to off current ratio $2.04{\times}10^7$, sub-threshold swing 2.45 V/decade와 Vth 10.45 V를 확보할 수 있었다. 또한 RTA 열처리 후 밴드갭이 3.25에서 3.41로 확장되는 특성을 나타내었다. 특히 RTA 열처리 후 stoichiometric $TiO_2$ 상태와는 다른 $Ti^{2+}$, $Ti^{3+}$, $Ti^{4+}$ 등의 다양한 oxidation states가 관찰되었으며 이러한 oxidation states를 $TiO_{2-x}$ 박막에서의 oxygen deficient 상태와 연관시킴으로써 oxygen vacancy의 n-type dopant로의 거동을 확인하였다. $TiO_2$ 채널 기반의 TFT 특성을 통하여서 indium free 또는 gallium free 산화물 채널로써의 가능성을 확인하였다.

• Proceedings of the Korea Association of Crystal Growth Conference
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• 1996.06a
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• pp.5-18
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• 1996

The solid state cesium ion source os alumino-silicate based zeolite which contains cerium. The material is an ionic conductor. Cesiums are stably stored in the material and one can extract the cesiums by applying electric field across the electrolyte. Cesium ion bombardment has the unique property of producing high negative ion yield. This ion source is used as the primary source for the production of a negative ion without any gas discharge or the need for a carrier gas. The deposition of materials as an ionic species in the energy range of 1.0 to 300eV is recently recognized as a very promising new thin film technique. This energetic non-thermal equilibrium deposition process produces films by “Kinetic Bonding / Energetic Condensation" mechansim not governed by the common place thermo-mechanical reaction. Under these highly non-equilibrium conditions meta-stable materials are realized and the negative ion is considered to be an optimum paeticle or tool for the purpose. This process differs fundamentally from the conventional ion beam assisted deposition (IBAD) technique such that the ion beam energy transfer to the deposition process is directly coupled the process. Since cesium ion beam sputter deposition process is forming materials with high kinetic energy of metal ion beams, the process provider following unique advantages:(1) to synthesize non thermal-equilibrium materials, (2) to form materials at lower processing temperature than used for conventional chemical of physical vapor deposition, (3) to deposit very uniform, dense, and good adhesive films (4) to make higher doposition rate, (5) to control the ion flux and ion energy independently. Solid state cesium ion beam sputter deposition system has been developed. This source is capable of producing variety of metal ion beams such as C, Si, W, Ta, Mo, Al, Au, Ag, Cr etc. Using this deposition system, several researches have been performed. (1) To produce superior quality amorphous diamond films (2) to produce carbon nitirde hard coatings(Carbon nitride is a new material whose hardness is comparable to the diamond and also has a very high thermal stability.) (3) to produce cesiated amorphous diamond thin film coated Si surface exhibiting negative electron affinity characteristics. In this presentation, the principles of solid state cesium ion beam sputter deposition and several applications of negative metal ion source will be introduced.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.325-325
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• 2008

스크린 프린팅에 의한 압전 후막은 MEMS 공정을 이용하여 마이크로 펌프, 마이크로 벨브, 마이크로 센서, 마이크로 로봇 등 여러 초소형 기계부품에 응용되고 있으며, Sol-Gel, PLD를 이용해 증착된 막 등에 비해 수십${\mu}m$의 비교적 두꺼운 막을 형성시킬 수 있는 장점을 가지고 있다. 그러나 실리콘 기판을 사용하여 스크린 프린팅으로 형성된 압전 후막의 경우, 공정상 바인더를 연소시키는 과정을 거치게 되므로, 밀집된(Dense) 구조를 가지는 막을 만들기가 어렵다. 이로 인해 스크린 프린팅에 의한 후막은 전기적 특성 및 기계적 특성이 떨어지는 경향이 있다. 본 연구에서는 스크린 프린팅에 의한 압전 후막의 밀집된 구조 및 특성을 향상시키기 위해 0.01Pb$(Mg_{1/2}W_{1/2})$O3-0.41Pb$(Ni_{1/3}Nb_{2/3})O_3-0.35PbTiO_3-0.23PbZrO_3$의 powder와 Attrition 밀링 처리된 powder를 비율별로 혼합하여 입자의 크기를 변화시켜 막의 충진 밀도를 향상시켰으며, 열처리 효과를 극대화시키기 위해 RTA(Rapidly Thermal Annealing)를 통해 열처리 하였다. Attrition 밀링에 의한 파우더를 각각 비율별로 100%, 50%, 25%로 혼합하여 만든 압전 세라믹 페이스트는 P-type(100)Si Wafer sample 위에 $1{\mu}m$의 하부전극용($1100^{\circ}C$) Ag 전극을 screen print하여 소결했다. 그리고 다시 전극이 형성된 Si wafer 위에 스크린 프린팅하고, 건조 한 후 RTA로 300초 동안 열처리 한 결과 밀집된 구조를 가지는 압전 후막을 제작 수 있었다.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1341-1342
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• 2006

Electrical characteristics of field-effect thin film transistors (TFTs) with p-channels of CdTe/CdHgTe core-shell nanocrystals are investigated in this paper. For the fabrication of bottom- and top-gate TFTs, CdTe/CrHgTe nanocrystals synthesized by colloidal method are first dispersed on oxidized p+ Si substrates by spin-coating, the dispersed nanoparticles are sintered at $150^{\circ}C$ to form the channels for the TFTs, and $Al_{2}O_{3}$ layers are deposited on the channels. A representative bottom-gate field-effect TFT with a bottom-gate $SiO_2$ layer exhibits a mobility of $0.21cm^2$/ Vs and an Ion/Ioff ratio of $1.5{\times}10^2$ and a representative top-gate field-effect TFT with a top-gate $Al_{2}O_{3}$ layer provides a field-effect mobility of $0.026cm^2$/ Vs and an Ion/Ioff ratio of $2.5{\times}10^2$. $Al_{2}O_{3}$ was deposited for passivation of CdTe/CdHgTe core-shell nanocrystal layer, resulting in enhanced hole mobility, Ior/Ioff ratio by 0.25, $3{\times}10^3$, respectively. The CdTe/CdHgTe nanocrystal-based TFTs with bottom- and top gate geometries are compared in this paper.