• Tribology and Lubricants
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• v.35 no.3
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• pp.176-182
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• 2019

The primary objective of this study is to treat a monocrystalline silicon (Si) wafer having a thickness of $279{\mu}m$ by employing the ultrasonic nanocrystal surface modification (UNSM) technology for improving the efficiency and service life of nano-electromechanical systems (NEMSs) and micro-electromechanical systems (MEMSs) by enhancing of wear and corrosion resistances. The wear and corrosion resistances of the Si wafer were systematically investigated before and after UNSM treatment, wherein abrasive, oxidative and spalling wear mechanisms were applied to the as-received and subsequently UNSM-treated Si wafer. Compared to the asreceived state, the wear and corrosion resistances of the UNSM-treated Si wafer are found to be enhanced by about 23% and 14%, respectively. The enhancement in wear and corrosion resistances after UNSM treatment may be attributed to grain size refinement (confirmed by Raman spectroscopy) and modified surface integrity. Furthermore, it is observed that the Raman intensity reduced significantly after UNSM treatment, whereas neither the Raman shift nor new phases were found on the surface of the UNSM-treated Si wafer. In addition, the friction coefficient values of the as-received and UNSM-treated Si wafers are found to be about 0.54 and 0.39, respectively. Hence, UNSM technology can be effectively incorporated as an alternative mechanical surface treatment for NEMSs and MEMSs comprising Si wafers.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.7 no.3
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• pp.393-399
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• 1997

H-SiC single crystals were successfully grown by the sublimation method and the optimum growth conditions were established. The grown SiC crystals were about 33 mm in diameter and 11 mm in length. The micropipe density of the polished SiC wafers was 400/$\textrm{cm}^2$, and the planar defect density was 50/$\textrm{cm}^2$. Raman spectroscopy and DCXRD analysis were used to examine the crystallinity of Acheson seeds and the 6H-SiC wafers. As a result, the crystallinity of the 6H-SiC wafers was better than that of Acheson seeds. For examination of the electrical properties of the undopped 6H-SiC wafers Hall measurements were applied. According to the measurements the carrier concentration was estimated to be $3.91{\times}10^{15}/\textrm {cm}^3$ and doping type of the undopped. 6H-SiC wafers was n-type.

• Proceedings of the Materials Research Society of Korea Conference
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• 2010.05a
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• pp.27.2-27.2
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• 2010

In recent years, there is a strong requirement of low cost, stable microelectro mechanical systems (MEMS) for resonators, microswitches and sensors. Most of these devices consist of freely suspended microcantilevers, which are usually made by the etching of some sacrificial materials. Herein, we have attempted to use Si nanowires, inherited from the parent Si wafer, as a sacrificial material due to its porosity, low cost and ease of fabrication. Prior to the fabrication of the Si nanowires silver nanoparticles were continuously formed on the surface of Si wafer. Vertically aligned Si nanowires were fabricated from the parent Si wafers by aqueous chemical route at $50^{\circ}C$. Afterwards, the morphological and structural characteristics of the Si nanowires were investigated. The morphology of nanowires was strongly modulated by the resistivity of the parent wafer. The 3-step etching of nanowires in diluted KOH solution was carried out at room temperature in order to control the fast etching. A layer of $Si_3N_4$ (300 nm) was used for the selective fabrication of nanowires. Finally, a freely suspended bridge of zinc oxide (ZnO) was fabricated after the removal of nanowires from the parent wafer. At present, we believe that this technique may provide a platform for the inexpensive fabrication of futuristic MEMS.

• Proceedings of the KWS Conference
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• 2000.10a
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• pp.284-286
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• 2000

• Journal of Welding and Joining
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• v.19 no.3
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• pp.305-310
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• 2001

UBM-coated Si-wafer was fluxlessly soldered with glass substrate in $N_2$ atmosphere using plasma cleaning method. The bulk Sn-37wt.%Pb solder was rolled to the sheet of $100\mu\textrm{m}$ thickness in order to bond a solder disk by fluxless 1st reflow process. The oxide layer on the solder surface was analysed by AES(Auger Electron Spectroscopy). Through rolling, the oxide layer on the solder surface became thin, and it was possible to bond a solder disk on the Si-wafer with fluxless process in $N_2$ gas. The Si-wafer with a solder disk was plasma-cleaned in order to remove oxide layer formed during 1st reflow and soldered to glass by 2nd reflow process without flux in $N_2$ atmosphere. The thickness of oxide layer decreased with increasing plasma power and cleaning time. The optimum plasma cleaning condition for soldering was 500W 12min. The joint was sound and the thicknesses of intermetallic compounds were less than $1\mu\textrm{m}$.

• Korean Journal of Materials Research
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• v.11 no.3
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• pp.159-163
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• 2001

The success of SDB (silicon wafer direct bonding) technology can be estabilished by bonding on the bonded interface with no defects and Preventing temperature dependent bubbles. In this research, we observed the behavior of the intrinsic bubbles by transmitting the infrared light and the increase of the bubble pressure was found. And, the $SiO_2$-$SiO_2$ bonded wafer was achieved, which generates no intrinsic bubbles in the annealing under the atmospheric pressure. The intrinsic bubbles in the $SiO_2$-$SiO_2$ bonded wafer were generated in the annealing in the ultra high vacuum. This experimental result shows the relation between the bubble growth and the pressure.

• Proceedings of the KAIS Fall Conference
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• 2004.06a
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• pp.50-53
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• 2004

본 논문에서는 Si wafer와 Cu사이의 밀착력을 증가시키기 위해 Si wafer전처리 후 plasma와 SAMs처리 방법에 의한 Cu도금의 형성에 관한 방법을 설명하였다. Si wafer를 Piranha solution과 $0.5\%$ HF처리 후 유기박막인 SAMs과 plasma를 이용하는 방법으로 wafer와 Cu층 사이의 밀착력을 증가시켰다. 도금층의 밀착력은 scratch test 로 측정하였으며, AEM을 이용해 시편에 형성된 패턴의 형태를 관찰하고 SEM과 EDS를 이용해 시편의 조직을 관찰하였다. 그 결과 Si wafer를 O2, He, SAMs를 혼합처리 했을 때 밀착성이 가장 우수하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.392-392
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• 2010

In this study, high-speed chemical dry thinning process of Si wafer and evolution of surface roughness were investigated. Direct injection of NO gas into the reactor during the supply of F radicals from $NF_3$ remote plasmas was very effective in increasing the Si thinning rate due to the NO-induced enhancement of surface reaction but thinned Si surface became roughened significantly. Addition of Ar gas, together with NO gas, decreased root mean square (RMS) surface roughness of thinned Si wafer significantly. The process regime for the thinning rate enhancement with reduced surface roughness was extended at higher Ar gas flow rate. Si wafer thinning rate as high as $22.8\;{\mu}m/min$ and root-mean-squared (RMS) surface roughness as small as 0.75 nm could be obtained. It is expected that high-speed chemical dry thinning process has possibility of application to ultra-thin Si wafer thinning with no mechanical damage.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.5 no.5
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• pp.458-461
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• 2004

In order to improve the adhesion properties of copper, MPS(3-mercaptopropyltrimethoxysilane) organic film were employed. The plasma pretreatment in pure He or $He/O_{2}$ mixed gas environment greatly increased adhesion force. Adhesion force was measured by scratch test with nano indenter. Microstructures and surface roughness were observed with scanning electron microscope(SEM). The characteristics of MPS layer for pretreatment were studied with flourier transform infrared spectroscope(FT-IR) and contact angle tester. The heighest adhesion was achieved in the specimen pretreated with mixed plasma and NPS coating, which was 56mN. Other specimen showed lower value by $20{\%}$ to $30{\%}$. The roughness of substrate was not affected by the bonding strength of copper plating.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.478-480
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• 2004

다이아몬드 톱날을 이용한 얇은 Si 웨이퍼의 기계적인 다이싱은 chipping, crack 등의 문제점을 발생시킨다. 또한 stacked die 나 multi-chip등과 같은 3D-WLP(wafer level package)에서 via를 생성하기 위해 현재 사용되는 화학적 etching은 공정속도가 느리고 제어가 힘들며, 공정이 복잡하다는 문제점을 가지고 있다. 이러한 문제점을 해결하기 위해 현재 연구되고 있는 분야가 레이저를 이용한 웨이퍼 다이싱 및 드릴링이다. 본 논문에서는 UV 레이저를 이용한 얇은 Si 웨이퍼 다이싱 및 드릴링 시스템에 대해 소개하고, 웨이퍼 다이싱 및 드릴링 실험결과를 바탕으로 적절한 레이저 및 공정 매개변수에 대해 설명한다.