• Journal of the Korean Crystal Growth and Crystal Technology
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• v.7 no.2
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• pp.191-196
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• 1997

The micro-defects in the SiC single crystals were characterized using a variety of the microscopic techniques (OM, TEM, AFM). It was observed that the hexagonal-plate precipitates and the longitudinal micropipes are present inside of SiC wafers. TEM results exhibited that there are amorphous phase in the SiC wafer and the phase were originated from the formation of the nonstoichiometric $Si_{1-x}_xC_x$ phases during growth process.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.743-746
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• 2003

We have successfully used hydrophobic direct-wafer bonding, along with H-induced layer splitting of Ge, to transfer 700nm think, single-crystal Ge films to Si substrates. Optical and electrical properties have been also observed on these samples. Triple-junction solar cell structures gown on these Ge/Si heterostructure templates show comparable photoluminescence intensity and minority carrier lifetime to a control structure grown on bulk Ge. When heavily doped p$^{+}$Ge/p$^{+}$Si wafer bonded heterostructures were bonded, ohmic interfacial properties with less than 0.3Ω$\textrm{cm}^2$ specific resistance were observed indicating low loss thermal emission and tunneling processes over and through the potential barrier. Current-voltage (I-V) characteristics in p$^{+}$Ge/pSi structures show rectifying properties for room temperature bonded structures. After annealing at 40$0^{\circ}C$, the potential barrier was reduced and the barrier height no longer blocks current flow under bias. From these observations, interfacial atomic bonding structures of hydrophobically wafer bonded Ge/Si heterostructures are suggested.ested.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.374-375
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• 2006

This paper describes anodic bonding characteristics of MCA to Si-wafer using evaporated Pyrex #7740 glass thin-films for MEMS applications. Pyrex #7740 glass thin-films with the same properties were deposited on MCA under optimum RF sputter conditions (Ar 100 %, input power $1\;W/cm^2$). After annealing at $450^{\circ}C$ for 1 hr, the anodic bonding of MCA to Si-wafer was successfully performed at 600 V, $400^{\circ}C$ in $110^{-6}$ Torr vacuum condition. Then, the MCA/Si bonded interface and fabricated Si diaphragm deflection characteristics were analyzed through the actuation and simulation test. It is possible to control with accurate deflection of Si diaphragm according to its geometries and its maximum non-linearity being 0.05-0.08 %FS. Moreover, any damages or separation of MCNSi bonded interfaces did not occur during actuation test. Therefore, it is expected that anodic bonding technology of MCNSi-wafers could be usefully applied for the fabrication process of high-performance piezoelectric MEMS devices.

• 한국신재생에너지학회:학술대회논문집
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• 2010.06a
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• pp.72.2-72.2
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• 2010

Nowadays, the crystalline Si Solar cell are expected for economical renewable energy source. The cost of the crystalline Si solar cell are decreasing by improvement of its efficiency and decrease of the cost of the raw Si wafers for Solar cells. This Si wafer based crystalline Si solar cell is the verified technology from several decade of its history. Now, I will introduce one method that can be upgrade the efficiency by using simple and economical method. The name of this method is Rear Side Etching(RSE). The purpose of rear side etching is the elimination of n+ layer of rear side and increase of the flatness. The effects of rear side etching are the improvement of Voc and increase of efficiency by reducement series resistance and forming of uniform BSF. The experimental procedure for rear side etching is very simple. After anti-reflection coating on solar cell wafer, Solar cell wafer is etched by the etching chemical that react with only rear side not front side. This special chemical is no harmful to anti-reflection coating layer. It can only etched rear side of solar cell wafer. We can use etching image by optical microscope, minority carrier life time by WCT 120, SiNx thickness and refractive index by ellipsometer, cell efficiency for the RSE effect measurement. The key point of rear side etching is development of etching process condition that react with only rear side. If we can control this factor, we can achieve increase of solar cell efficiency very economically without new device.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.5
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• pp.301-306
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• 2017

Wire electrical discharge machining (WEDM) process was evaluated to slice Silicon (Si) for various applications. Specifically, various Si workpieces with various resistances, such as single and multi crystalline Si bricks and wafers were used. As conventional slicing processes, such as slurry-on or diamond-on wire slicing, are based on mechanical abrasions between Si and abrasive, there is a limitation to decrease the wafer thickness as well as kerf-loss. Especially, when the wafer thickness is less than $150{\mu}m$, wafer breakage increases dramatically during the slicing process. Single crystalline P-type Si bricks and wafers were successively sliced with considerable slicing speed regardless of its growth direction. Also, typical defects, such as microcracks, craters, microholes, and debris, were introduced when Si was sliced by electrical discharge. Also, it was found that defect type is also dependent on resistance of Si. Consequently, this study confirmed the feasibility of slicing single crystalline Si by WEDM.

• Journal of the Korean institute of surface engineering
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• v.51 no.3
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• pp.185-190
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• 2018

Dopant-free silicon heterojunction solar cells using Transition Metal Oxide(TMO) such as Molybdenum Oxide($MoO_X$) and Vanadium Oxide($V_2O_X$) have been focused on to increase the work function of TMO in order to maximize the work function difference between TMO and n-Si for a high-efficiency solar cell. One another way to increase the work function difference is to control the silicon wafer resistivity. In this paper, dopant-free silicon heterojunction solar cells were fabricated using the wafer with the various resistivity and analyzed to understand the effect of n-Si work function. As a result, it is shown that the high passivation and junction quality when $V_2O_X$ deposited on the wafer with low work function compared to the high work function wafer, inducing the increase of higher collection probability, especially at long wavelength region. the solar cell efficiency of 15.28% was measured in low work function wafer, which is 34% higher value than the high work function solar cells.

• Journal of the Korean Chemical Society
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• v.34 no.5
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• pp.396-403
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• 1990

We describe how to design and construct a LPCVD (Low Pressure Chemical Vapor Deposition) apparatus which can be applicable to the study of reaction mechanism in general CVD experiments. With this apparatus we have attempted to make diamond like carbon films on the p-type (111) Si wafer from (H$_2$ ＋ CH$_4$) gas mixtures. Two different methods have been tried to get products. (1)The experiment was carried out in the reactor with two different inlet gas tubes. One coated with phosphoric acid was used for supplying microwave discharged hydrogen gas stream, and methane has been passed through the other tube without the microwave discharge. In this method we got only amorphous carbon cluster products. (2) The gas mixture (H$_2$ ＋ CH$_4$) has been passed through the discharge tube with the Si wafer located in and/or near the microwave plasma. In this case diamond-like carbon products could be obtained.

• Korean Journal of Materials Research
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• v.24 no.12
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• pp.682-688
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• 2014

Physical and chemical changes in a polished wafer and in $2.5{\mu}m$ & $4{\mu}m$ epitaxially grown Si layer wafers (Epilayer wafer) after surface treatment were investigated. We characterized the influence of surface treatment on wafer properties such as surface roughness and the chemical composition and bonds. After each surface treatment, the physical change of the wafer surface was evaluated by atomic force microscopy to confirm the surface morphology and roughness. In addition, chemical changes in the wafer surface were studied by X-ray photoemission spectroscopy measurement. Changes in the chemical composition were confirmed before and after the surface treatment. By combined analysis of the physical and chemical changes, we found that diluted hydrofluoric acid treatment is more effective than buffered oxide etching for $SiO_2$ removal in both polished and Epi-Layer wafers; however, the etch rate and the surface roughness in the given treatment are different among the polished $2.5{\mu}m$ and $4{\mu}m$ Epi-layer wafers in spite of the identical bulk structural properties of these wafers. This study therefore suggests that independent surface treatment optimization is required for each wafer type, $2.5{\mu}m$ and $4{\mu}m$, due to the meaningful differences in the initial surface chemical and physical properties.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.11a
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• pp.159-159
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• 2003

• Journal of Welding and Joining
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• v.26 no.1
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• pp.12-16
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• 2008

본 보고에서는 3D 패키징에서 중요한 공정의 하나인 초박막 Si 웨이퍼 Thinning 공정에 대해 간략히 소개하였고, 표면처리에 대해 살펴보았다. 기계적, 특히 전기적 Damage를 줄이기 위한 최적화된 Thinning 공정과 신뢰성 분석 및 평가, 그리고 초박막 웨이퍼 핸들링 방법 등이 시스템적으로 개발되는 것이 중요하다. 칩 소형화 추세와 더불어 3D 패키징 기술이 중요시되는 산업 요구에 맞추어 향후 웨이퍼 Thinning 기술을 포함한 3D 기술의 핵심 공정기술들은 그 중요성이 증대할 것이고, 이에 대한 활발한 연구가 진행되리라 기대한다.