• Journal of Korea Foundry Society
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• v.33 no.2
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• pp.69-74
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• 2013

Silicon (Si) wafer was grown by using direct growth from Si melt and contaminations of wafer during the process were investigated. In our process, BN was coated inside of all graphite parts including crucible in system to prevent carbon contamination. In addition, coated BN layer enhance the wettability, which ensures the favorable shape of grown wafer by proper flow of Si melt in casting mold. As a result, polycrystalline silicon wafer with dimension of $156{\times}156$ mm and thickness of $300{\pm}20$ um was successively obtained. There were, however, severe contaminations such as BN and SiC on surface of the as-grown wafer. While BN powders were easily removed by brushing surface, SiC could not be eliminated. As a result of BN analysis, C source for SiC was from binder contained in BN slurry. Therefore, to eliminate those C sources, additional flushing process was carried out before Si was melted. By adding 3-times flushing processes, SiC was not detected on the surface of as-grown Si wafer. Polycrystalline Si wafer directly grown from Si melt in this study can be applied for the cost-effective Si solar cells.

• Korean Journal of Materials Research
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• v.8 no.10
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• pp.890-897
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• 1998

The direct wafer bonding between n-InP(001) wafer and the ${Si}_3N_4$(200 nm) film grown on the InP wafer by PECVD method was investigated. The surface states of InP wafer and ${Si}_3N_4$/InP which strongly depend upon the direct wafer bonding strength between them when they are brought into contact, were characterized by the contact angle measurement technique and atomic force microscopy. When InP wafer was etched by $50{\%}$ HF, contact angle was $5^{\circ}$ and RMS roughness was $1.54{\AA}$. When ${Si}_3N_4$ was etched by ammonia solution, RMS roughness was $3.11{\AA}$. The considerable amount of initial bonding strength between InP wafer and ${Si}_3N_4$/InP was observed when the two wafer was contacted after the etching process by $50{\%}$ HF and ammonia solution respectively. The bonded specimen was heat treated in $H^2$ or $N^2$, ambient at the temperature of $580^{\circ}C$-$680^{\circ}C$ for lhr. The bonding state was confirmed by SAT(Scannig Acoustic Tomography). The bonding strength was measured by shear force measurement of ${Si}_3N_4$/InP to InP wafer increased up to the same level of PECVD interface. The direct wafer bonding interface and ${Si}_3N_4$/InP PECVD interface were chracterized by TEM and AES.

• 한국신재생에너지학회:학술대회논문집
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• 2008.05a
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• pp.378-381
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• 2008

고효율 a-Si:H/c-Si 이종접합 태양전지를 얻기 위해서는 우수한 c-Si wafer 위에 고품질의 비정질 실리콘박막을 통한 heterointerface를 형성하는 것이 매우 중요하다. 이를 달성하기 위해서는 공정중에 오염되기 쉬운 Si wafer 표면 상태를 정확히 검사하고 잘 관리하여야 한다. 본 연구에서는 세정 및 표면산화에 따른 Si wafer 상태를 Spectroscopic Ellipsometry 및 u-PCD를 이용하여 분석하였으며, <$\varepsilon$2> @4.25eV 값이 Si wafer 상태를 잘 나타내고 있음을 확인하였고 세정 최적화 할 경우 그 값이 43.02에 도달하였다. 또한 RF-PECVD로 증착된a-Si:H 박막을 EMA 모델링을 통해 분석한 결과 낮은 결정성과 높은 밀도를 가지는 a-Si:H를 얻을 수 있었으며, 이를 이종접합 태양전지에 적용한 결과 Flat wafer상에서 10.88%, textured wafer 적용하여 13.23%의 변환효율을 얻었다. 결론적으로 Spectroscopic Ellipsometry가 매우 얇고 고품질의 다층 박막이 필요한 이종접합 태양전지 분석에 있어 매우 유용한 방법임이 확인되었다.

• Journal of the Korean Ceramic Society
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• v.36 no.8
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• pp.863-870
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• 1999

SOI(silicon on insulafor) was fabricated through the direct bonding using (100) Si wafer and 4$^{\circ}$off (100) Si wafer to investigate the stacking faults in silicon at the Si/SiO2 oxidized and bonded interface. The treatment time of wafer surface using MSC-1 solution was varied in order to observe the effect of cleaning on bonding characteristics. As the MSC-1 treating time increased surface hydrophilicity was saturated and surface microroughness increased. A comparison of surface hydrophilicity and microroughness with MSC-1 treating time indicates that optimum surface modified condition for time was immersed in MSC-1 for 2 min. The SOI structure directly bonded using (100) Si wafer and 4$^{\circ}$off (100) Si wafer at the room temperature were annealed at 110$0^{\circ}C$ for 30 min. Then the stacking faults at the bonding and oxidation interface were examined after the debonding. The results show that there were anomalies in the gettering of the stacking faults at the bonded region.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.128-128
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• 2010

In this study, we investigated the evolution and reduction of the surface roughness during the high-speed chemical dry thinning process of Si wafers. The direct injection of NO gas into the reactor during the supply of F radicals from NF3 remote plasmas was very effective in increasing the Si thinning rate, due to the NO-induced enhancement of the surface reaction, but resulted in the significant roughening of the thinned Si surface. However, the direct addition of Ar and N2 gas, together with NO gas, decreased the root mean square (RMS) surface roughness of the thinned Si wafer significantly. The process regime for the increasing of the thinning rate and concomitant reduction of the surface roughness was extended at higher Ar gas flow rates. In this way, Si wafer thinning rate as high as $20\;{\mu}m/min$ and very smooth surface roughness was obtained and the mechanical damage of silicon wafer was effectively removed. We also measured die fracture strength of thinned Si wafer in order to understand the effect of chemical dry thinning on removal of mechanical damage generated during mechanical grinding. The die fracture strength of the thinned Si wafers was measured using 3-point bending test and compared. The results indicated that chemical dry thinning with reduced surface roughness and removal of mechanical damage increased the die fracture strength of the thinned Si wafer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.81-81
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• 2009

반도체 산업의 중심 소재인 실리콘(Si)은 사용 목적과 환경에 따라 물성적 한계가 표출되기 시작했다. 그래서 각각의 목적에 맞는 재료의 개발이 필요하다는 것을 인식하게 되었다. SiC wafer는 큰 band gap energy와 고온 안정성, 캐리어의 높은 드리프트 속도 그리고 p-n 접합이 용이하다. 또한 소재 자체가 화학적으로 안정하고 $500\sim600^{\circ}C$에서 소자 제조 시 고온공정이 가능하며, 실리콘이나 GaAs에 비해 고출력을 낼 수 있는 재료이다. 반도체 소자로 이용하기 위한 wafer 가공 공정에 있어 물리적 힘에 의한 stress를 많이 받아 wafer가 휘는 현상이 생긴다. 반도체 소자의 기본이 되는 wafer가 휨 현상을 일으키면 wafer 위에 소자가 올라갈 경우 소자의 불균일성 때문에 반도체의 물성에 나쁜 영향을 미치게 된다. 그래서 반도체 소자의 기본이 되는 wafer의 휨 현상 개선이 중요하다. 본 연구에서는 산화로에서 Ar 분위기에서 압력 760torr, 온도 $1100^{\circ}C$ 부근에서의 조건으로 진행을 하여 wafer의 Flatness Tester(FT-900, NIDEK) 장비로 SORI, BOW, GBIR 값의 변화에 초점을 맞추었다. SiC 단결정을 sawing후 가공 전 wafer를 열처리하여 가공을 진행하는 것과 열처리 하지 않은 wafer의 SORI, BOW, GBIR 값 비교, 그리고 lapping, grinding, polishing 등의 가공 진행 중간 중간에 열처리를 하여 진행하는 것과 가공 진행 중간 중간에 열처리를 하지 않고 진행한 wafer의 SORI, BOW, GBIR 값의 비교를 통해 wafer의 휨 현상 개성에 관해 알아본다.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.12 no.3
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• pp.120-125
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• 2002

Si-wafers for solar cells were cast in a size of $50{\times}46{\times}0.5{\textrm}{mm}^3$ by vacuum casting method. The graphite mold coated by BN powder, which was to prevent the reaction of carbon with the molten silicon, was used. Without coating, the wetting and reaction of Si melt to graphite mold was very severe. In the case of BN coating, SiC was formed in the shape of tiny islands at the surface of Si wafer by the reaction between Si-melt and carbon of the graphite mold on the high temperature. The grain size was about 1 mm. The efficiency of Si solar cell was lower than that of Si solar cell fabricated on commercial single and poly crystalline Si wafer. The reason of low efficiency was discussed.

• International Journal of Precision Engineering and Manufacturing
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• v.7 no.3
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• pp.35-38
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• 2006

A study of electrowetting using an Octadecyltrichlorosilane (OTS) self-assembled monolayer (SAM) and Z- Tetraol 2000 perfluoropolyether lubricant as hydrophobic layers on Si and $SiO_2$ wafer was performed. The $SiO_2$ layer used as insulating layer was thermally grown on the silicon wafer to a thickness of 220-230 nm. The results demonstrated that the contact angle decreased from $100^{\circ}$ to $80^{\circ}$ at 28 V applied potential on $SiO_2$ wafer coated with OTS and the contact angle appeared to be reversible. However, the contact angle on the $SiO_2$ wafer coated with Z- Tetraol 2000 was not observable at 28 V applied potential. Furthermore, the contact angle on the Si wafer coated with OTS or Z- Tetraol 2000 appeared to be irreversible due to the generation of electrolysis in the droplet. It is concluded that it is feasible to use SAM as a hydrophobic layer in electrowetting applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.54-54
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• 2009

Ag thick film has been used for electrode materials with the excellent conductivity. Ag electrode is used in screen-printed silicon solar cells as a electrode material. Compared to photolithography and buried-contact technology, screen-printing technology has the merit of fabricating low-priced cells and enormous cells in a few hours. Ag paste consists of Ag powders, vehicles and additives such as frits, metal powders (Pb, Bi, Zn). Frits accelerate the sintering of Ag powders and induce the connection between Ag electrode and Si wafer. Thermophysical properties of frits and reactions among Ag, frits and Si influence on cell performance. In this study, Ag pastes were fabricated with adding different kinds of frits. After Ag pastes were printed on silicon wafer by screen-printing technology, the cells were fired using a belt furnace. The cell parameters were measured by light I-V to determine the short-circuit current, open-circuit voltage, FF and cell efficiency. In order to study the relationship between the reactivity of Ag, frit, Si and the electrical properties of cells, the reaction of frits and Si wafer on was studied with thermal properties of frits. The interface structure between Ag electrode and Si wafer were also measured for understanding the reactivity of Ag, frit and Si wafer. The excessive reactivity of Ag, frit and Si wafer certainly degraded the electrical properties of cells. These preliminary studies suggest that reactions among Ag, frits and Si wafer should optimally be controlled for cell performances.

• Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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• 2004.11a
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• pp.90-98
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• 2004

Nano/micro-scale studies on friction properties were conducted on Si (100) and three self-assembled monolayers (SAMs) (PFOTC, DMDM, DPDM) coated on Si-wafer by chemical vapor deposition technique. Experiments were conducted at ambient temperature $(24{\pm}1^{\circ}C)$ and humidity $(45{\pm}5\%)$. Nano-friction was evaluated using Atomic Force Microscopy (AFM) in the range of 0-40nN normal loads. In both Si-wafer and SAMs, friction increased linearly as a function of applied normal load. Results showed that friction was affected by the inherent adhesion in Si-wafer, and in the case of SAMs the physical/chemical structures had a major influence. Coefficient of friction of these test samples was also evaluated at the micro-scale using a micro-tribotester. It was observed that SAMs had superior frictional property due to their low interfacial energies. In order to study of the effect of contact area on friction coefficient at the micro-scale, friction was measured for Si-wafer and DPDM against Soda Lime balls (Duke Scientific Corporation) of different radii 0.25 mm, 0.5 mm and 1 mm at different applied normal loads $(1500,\;3000\;and\;4800{\mu}N)$. Results showed that Si-wafer had higher friction coefficient than DPDM. Furthermore, unlike that in the case of DPDM, friction was severely influenced by wear in the case of Si-wafer. SEM evidences showed that solid-solid adhesion to be the wear mechanism in Si-wafer.