• Title/Summary/Keyword: Si substrate

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Crystallographic Characteristics of ZnO Films Deposited on SiO$_2$/Si Substrate

  • Park, H.D.;Kim, K.S.;Lee, C.S.;Kim, J.W.;Han, B.M.;Kim, S.Y.
    • Journal of the Korean institute of surface engineering
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    • v.28 no.6
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    • pp.386-392
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    • 1995
  • The RF planar magnetron sputtering technique was used to fabricate uniform ZnO/$SiO_2$/Si thin films at high growth rate. A detailed crystallographic character of these thin films has been carried oct using XRD, XRC, and SEM. These thin films have the configuration of c-axis orientation perpendicular to $SiO_2$/ Si substrate. The dependence of the thickness of ZnO/$SiO_2$/Si films on applied RF power parameters was also investigated. The crystallinity of films was improved as the substrate temperature was high, RF input power increased, and Ar/$O_2$ ratio decreased. Also, most of ZnO films fabricated on $SiO_2$/Si were suitable for SAW filter since a standard deviation of XRC (002) peak was less than $6^{\circ}$. The presence of the $SiO_2$ layer has a beneficial effect on the crystalline quality of the grown ZnO films.

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Structural Study of Epitaxial NiSi on Si (001) Substrate by Using Density Functional Theory (DFT) (DFT를 이용한 Si (001) 기판의 에피택시 NiSi 구조 연구)

  • Kim, Dae-Hee;Seo, Hwa-Il;Kim, Yeong-Cheol
    • Journal of the Semiconductor & Display Technology
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    • v.6 no.4
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    • pp.65-68
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    • 2007
  • An epitaxial NiSi structure on Si (001) substrate was studied by using density functional theory (DFT). Orhorhombic and B2-NiSi structures were compared first. B2 structure was further considered as it has same crystal structure as Si and the lattice mismatch between B2 and Si is small, compared to orthorhombic-NiSi. The lattice parameters of x- and y-direction in B2-NiSi structure were modified to match with those in Si (001). The size reduction of the lattice parameter of B2-NiSi to match with that of Si increased the lattice parameter of z-direction by 10.5%. Therefore, we propose that an optimum structure of NiSi for epitaxial growth on Si (001) is a tetragonal structure.

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Fabrication of excimer laser annealed poly-si thin film transistor by using an elevated temperature ion shower doping

  • Park, Seung-Chul;Jeon, Duk-Young
    • Electrical & Electronic Materials
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    • v.11 no.11
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    • pp.22-27
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    • 1998
  • We have investigated the effect of an ion shower doping of the laser annealed poly-Si films at an elevated substrate temperatures. The substrate temperature was varied from room temperature to 300$^{\circ}C$ when the poly-Si film was doped with phosphorus by a non-mass-separated ion shower. Optical, structural, and electrical characterizations have been performed in order to study the effect of the ion showering doping. The sheet resistance of the doped poly-Si films was decreased from7${\times}$106 $\Omega$/$\square$ to 700 $\Omega$/$\square$ when the substrate temperature was increased from room temperature to 300$^{\circ}C$. This low sheet resistance is due to the fact that the doped film doesn't become amorphous but remains in the polycrystalline phase. The mildly elevated substrate temperature appears to reduce ion damages incurred in poly-Si films during ion-shower doping. Using the ion-shower doping at 250$^{\circ}C$, the field effect mobility of 120 $\textrm{cm}^2$/(v$.$s) has been obtained for the n-channel poly-Si TFTs.

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Anisotropic Wet-Etching Process of Si Substrate for Formation of Thermal Vias in High-Power LED Packages (고출력 LED 패키지의 Thermal Via 형성을 위한 Si 기판의 이방성 습식식각 공정)

  • Yu, B.K.;Kim, M.Y.;Oh, T.S.
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.4
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    • pp.51-56
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    • 2012
  • In order to fabricate through-Si-vias for thermal vias by using wet etching process, anisotropic etching behavior of Si substrate was investigated as functions of concentration and temperature of TMAH solution in this study. The etching rate of 5 wt%, 10 wt%, and 25 wt% TMAH solutions, of which temperature was maintained at $80^{\circ}C$, was $0.76{\mu}m/min$, $0.75{\mu}m/min$, and $0.30{\mu}m/min$, respectively. With changing the temperature of 10 wt% TMAH solution to $20^{\circ}C$ and $50^{\circ}C$, the etching rate was reduced to $0.067{\mu}m/min$ and $0.233{\mu}m/min$, respectively. Through-Si-vias of $500{\mu}m$-depth could be fabricated by etching a Si substrate for 5 hours in 10 wt% TMAH solution at $80^{\circ}C$ after forming same via-pattern on each side of the Si substrate.

The Effects of Ti Film Thicknesses and Si Substrate Orientations on Phase Transition of Tisi$_2$ ($TiSi_2$의 상전이에 미치는 박막의 두께 및 기판의 방위의 영향)

  • Yoon, Gang-Joong;Jeon, Hyeong-Tae
    • Korean Journal of Materials Research
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    • v.5 no.7
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    • pp.820-828
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    • 1995
  • Ti-sillcides are formed on an atomically clean Si substrate and its phase transition and surface and interface morphologies are examined depending on the Ti-film thicknesses, deposition temperatures and Si substrate orientations. Ti film thicknesses of 400$\AA$ and 200$\AA$ have been deposited at elevated temperatures from 50$0^{\circ}C$ to 90$0^{\circ}C$ with increments of 10$0^{\circ}C$ on Si(100) and Si(111) Ti-silicides are formed and analyzed with using XRD, SEM, and TEM to verify the phase transition and the surface and interface morphologies. The phase transition from C49 to C54 is observed to occur around $650^{\circ}C$ and examined to show some retardation depending on the substrate orientation and film thickness. This retardation of phase transition is explained by the consideration based on the surface and volume free energies. A rough surface of C49 TiSi$_2$is exhibited because of characteristics of nonuniform diffusion across the interface while the smooth surface and island formation of C54 TiSi$_2$is examined.

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Toward Charge Neutralization of CVD Graphene

  • Kim, Soo Min;Kim, Ki Kang
    • Applied Science and Convergence Technology
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    • v.24 no.6
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    • pp.268-272
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    • 2015
  • We report the systematic study to reduce extrinsic doping in graphene grown by chemical vapor deposition (CVD). To investigate the effect of crystallinity of graphene on the extent of the extrinsic doping, graphene samples with different levels of crystal quality: poly-crystalline and single-crystalline graphene (PCG and SCG), are employed. The graphene suspended in air is almost undoped regardless of its crystallinity, whereas graphene placed on an $SiO_2/Si$ substrate is spontaneously p-doped. The extent of p-doping from the $SiO_2$ substrate in SCG is slightly lower than that in PCG, implying that the defects in graphene play roles in charge transfer. However, after annealing treatment, both PCG and SCG are heavily p-doped due to increased interaction with the underlying substrate. Extrinsic doping dramatically decreases after annealing treatment when PCG and SCG are placed on the top of hexagonal boron nitride (h-BN) substrate, confirming that h-BN is the ideal substrate for reducing extrinsic doping in CVD graphene.

Characteristics of ZnO Thin Films Grown on p-type Si and Sapphire Substrate by Pulsed Laser Deposition

  • Lee, K. C.;Lee, Cheon
    • KIEE International Transactions on Electrophysics and Applications
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    • v.3C no.6
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    • pp.241-245
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    • 2003
  • ZnO thin films on (l00) p-type Si and sapphire substrates have been deposited by a pulsed laser deposition technique using an Nd:YAG laser with a wavelength of 266 nm. The influence of the deposition parameters such as oxygen pressure, substrate temperature and laser energy density on the properties of the grown films was studied. The experiments were performed for substrate temperatures in the range of 200∼50$0^{\circ}C$ and oxygen pressure in the range of 100∼700 sccm. All of the films grown in this experiment show strong c-axis orientation with (002) textured ZnO peak. With increasing substrate temperature, the FWHM (full width at half maximum) and surface roughness were decreased. In the case of using sapphire substrate, the intensity of PL spectra increased with increasing ambient oxygen flow rate. We investigated the structural and morphological properties of ZnO thin films using X-ray diffraction (XRD), scanning electron microscopy (SEM) and atomic force microscopy (AFM).

Atomic Layer Deposition of HfO2 Films on Ge

  • Cho, Young Joon;Chang, Hyo Sik
    • Applied Science and Convergence Technology
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    • v.23 no.1
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    • pp.40-43
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    • 2014
  • We investigated the growth characteristics and interfacial properties of $HfO_2$ films deposited on Ge substrate through atomic layer deposited (ALD) by using an in-situ medium energy ion scattering analysis. The growth kinetics of $HfO_2$ grown on a $GeO_2/Ge$ substrate through ALD is similar to that grown on an $SiO_2/Si$ substrate. However, the incubation period of $HfO_2$ deposition on Ge is shorter than that on Si. The $HfO_2$ grown on the GeO/Ge substrate shows a significant diffusion of Hf atoms into the substrate interface and GeO volatilization after annealing at $700^{\circ}C$. The presence of low-quality Ge oxide or suboxide may degrade the electrical performance of device.

Properties of Substrate-free GaN Grown on AIN/Si by HVPE (HVPE법으로 AIN/Si 기판 위에 성장한 Substrate-free GaN의 특성)

  • 이영주;김선태;정성훈;문동찬
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1997.11a
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    • pp.194-197
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    • 1997
  • A hydride vapor phase epitaxy (HVPE) method was performed to prepare the thick-fi lm GaN on AIN/Si substrates. We obtained substrate-free GaN. The foul t-width at half maximum of double crystal X-ray rocking curve from 350 ${\mu}{\textrm}{m}$ thick substrate-free GaN was ~1000 arcsec. The photoluminescence spectrum (at 20 K) shows the narrow bound exiton (I$_2$) line and wealth donor-acceptor pair recombination however. there was not observed deep donor-accepter pair recombination indicate the substrate-free GaN crystal prepared in this study are of high purity and high crystalline quality.

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Interaction of Co/Ti Bilayer with $SiO_2$ Substrate ($SiO_2$와 Co/Ti 이중층 구조의 상호반응)

  • 권영재;이종무;배대록;강호규
    • Journal of the Korean Vacuum Society
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    • v.7 no.3
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    • pp.208-213
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    • 1998
  • Silicidation of the Co/Ti/Si bilayer system in which Ti is used as epitaxy promoter for $CoSi_2$has recently received much attention. The Co/Ti bilayer on the spacer oxide of gate electrode must be thermally stable at high temperatures for a salicide transistor to be fabricated successfully. In the $SiO_2$substrate was rapid-thermal annealed. The Sheet resistances of the Co/Ti bilayer increased substantially after annealing at $600^{\circ}C$, which is due to the agglomeration of the Co layer to reduce the interface energy between the Co layer and the $SiO_2$substrate. In the bilayer system insulating Ti oxide stoichiometric Ti oxide and silicide were not found after annealing.

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