• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05c
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• pp.79-82
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• 2002

$(Ba_{0.6-x}Sr_{0.4}Ca_x)TiO_3$ + ywt% MgO (x=0.10, 0.15, 0.20, y=0.0~3.0) ceramics were fabricated by the conventional solid-state reaction, and their structural and dielectric properties were investigated with variation of composition ratio and MgO doping content. A second phase, representative of MgO, appears in 3wt% MgO-doped BSCT specimens. Average grain sizes decreased with increasing amounts of MgO, and the BSCT(40/40/20) specimens doped with 3wt% MgO showed a value of $9.3{\mu}m$. The Curie temperature and relative dielectric constant at room temperature were decreased with increasing MgO doping content and Ca composition ratio. The relative dielectric constant was non-linearly decreased as the field strength is increased. The tunability was increased with decreasing a Ca content and the BSCT(50/40/10) specimen doped with 1.0wt% MgO content showed the highest value of 6.4% at 5kV/cm.

• Journal of the Korean Society for Precision Engineering
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• v.34 no.4
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• pp.265-272
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• 2017

Velocity ripple in manufacturing processes reduces productivity and limits the precision of the product. In practice, the frequency and phase of velocity ripples always change minutely, which makes it impossible to compensate for the ripple by simply inserting an opposite feed-forward signal in the system. In this study, an active-phase compensation algorithm was developed to enable the velocity-ripple controller to track the phase change of the ripples in real time. The proposed controller can compensate for the velocity ripple whatever its cause, including disturbance by the torque ripple. The algorithm consists of three functional modules: the velocity-ripple extractor, the synchronized integrator, and the phase shifter. Experimental results showed that the proposed controller clearly reduces velocity ripples with phase variation.

• Journal of Information Display
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• v.9 no.1
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• pp.1-5
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• 2008

Two new impulsive driving technologies for 120Hz liquid crystal display (LCD) panels are proposed to improve moving picture quality. One technology generates the dark frame using an adder and a shifter simply without using any look up tables (LUTs). It results in a cost effective impulsive scheme with motion picture quality comparable to that of high speed driving. The other is a backlight flashing method designed to avoid ghost images. The issue of ghost images caused by the slow response time of liquid crystal (LC) is solved by means of 120Hz overdriving and 120Hz backlight flashing. Using the perceived blur edge time (PBET) metric, measured moving picture response time (MPRT) values were 10.8ms and 4.4ms, respectively, while that of 120Hz high speed driving was 10.1ms.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.3
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• pp.308-315
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• 2002

In this paper, the 5-bit digital phase shiftier with 10 InGaAs HEMTs is designed and fabricated for U.S. mobile DBS receiving active phased array antenna system in 12 GHz band. 11.25 $^{\circ}$, 22.5$^{\circ}$ and 45$^{\circ}$ phase bits are designed in leaded-line type. 90$^{\circ}$ and 180$^{\circ}$ phase bits are designed in reflection type combined with ring hybrid. The return loss more than 17.5 ㏈, insertion louts less than 7.8 ㏈, and maximum phase error of $\pm$6$^{\circ}$for 32 phase responses are measured in 12.2 GHz~ 12.7 GHz band.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.12
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• pp.1359-1369
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• 2007

This paper describes the technique of satellite direction finding and main beam steering of the adaptive array antenna system which is used for mobile TT&C(Tracking Telemetry&Command) system. To be able to control the satellite on mobile vehicle while moving, the relative directional information of the satellite to the mobile vehicle is necessary to make main beam to the direction of satellite. To do this MUSIC, which is one of the super-resolution algorithm of wave direction finding, is used and then the performance analysis and quantization problem of phase shifter are addressed. This paper is valuable in the respect of showing feasibility of designing the moble TT&C using adative array antenna system.

• Korean Journal of Optics and Photonics
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• v.4 no.4
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• pp.434-441
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• 1993

Focusing geometry dependence of output Stokes energy in single pass methane Raman shifter is investigated. The experimental result shows that the threshold energy decreases as confocal parameter increases. This result can be explained by gain suppression caused by Stokes - anti-Stokes coupling. In this paper, we give simple analysis for the focusing geometry dependence of Stokes - anti-Stokes coupling and present the criterion of confocal parameter to reduce the gain suppression. Focusing geometry dependence of stimulated Brillouin scattering is measured and the result is in good agreement with theoretical prediction.

• ETRI Journal
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• v.37 no.6
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• pp.1154-1164
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• 2015

This paper proposes a fully sensorless driver for a permanent magnet synchronous motor (PMSM) integrated with a digital motor controller and an analog pre-driver, including sensing circuits and estimators. In the motor controller, a position estimator estimates the back electromotive force and rotor position using a sliding-mode observer. In the pre-driver, drivers for the power devices are designed with a level shifter and isolation technique. In addition, a current sensing circuit measures a three-phase current. All of these circuits are integrated in a single chip such that the driver achieves control of the speed with high accuracy. Using an IC fabricated using a $0.18{\mu}m$ BCDMOS process, the performance was verified experimentally. The driver showed stable operation in spite of the variation in speed and load, a similar efficiency near 1% compared to a commercial driver, a low speed error of about 0.1%, and therefore good performance for the PMSM drive.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.4
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• pp.105-109
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• 2018

In this paper, the performance enhancement of a time-modulated array is described. The proposed time-modulated array is based on the topology of a conventional array but uses apodized discrete time switching, instead of phase shifters, to achieve beamforming functions with side-band suppression. Numerical simulations are carried out to examine the performance of this beamforming system based on apodized time sequence of 16 elements linear array. Numerical results reveal that the proposed method provides a more flexible and accurate way of producing desired beampatterns with low or ultralow side-lobe level (SLL) compared with the conventional methods.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.4
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• pp.419-426
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• 2014

This paper proposes a high-throughput encoding process and encoder architecture for quasi-cyclic low-density parity-check codes in IEEE 802.11ac standard. In order to achieve the high throughput with low complexity, a partially parallel processing based encoding process and encoder architecture are proposed. Forward and backward accumulations are performed in one clock cycle to increase the encoding throughput. A low complexity cyclic shifter is also proposed to minimize the hardware overhead of combinational logic in the encoder architecture. In IEEE 802.11ac systems, the proposed encoder is rate compatible to support various code rates and codeword block lengths. The proposed encoder is implemented with 130-nm CMOS technology. For (1944, 1620) irregular code, 7.7 Gbps throughput is achieved at 100 MHz clock frequency. The gate count of the proposed encoder core is about 96 K.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.05a
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• pp.264-267
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• 2002

This paper presents the design of a pipelined virtual output queue routing engine for an advanced input-queued ATM switch, which has a serial cross bar structure. The proposed routing engine has been designed for wire-speed routing with a pipelined buffer management. It provides the tolerance of requests and grants data transmission latency between the routing engine and central arbiter using a new request control method that is based on a high-speed shifter. The designed routing engine has been implemented in a field programmable gate array (FPGA) chip with a 77MHz operating frequency, 16$\times$16 switch size, and 2.5Gbps/port speed.