• Journal of the Korea Society for Simulation
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• v.28 no.2
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• pp.119-129
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• 2019

Although line production systems with finite buffers have been studied over several decades, except for some special cases there are no explicit expressions for system performances such as waiting times(or response time) and blocking probability. Recently, a max-plus algebraic approach for buffer-sharing systems with constant processing times was introduced and it can lead to analytic expressions for (higher) moment and tail probability of stationary waiting. Theoretically this approach can be applied to general processing times, but it cannot give a proper way for computing performance measures. To this end, in this study we developed simulation models using @RISK software and the expressions derived from max-plus algebra, and computed and compared blocking probability, waiting time (or response time) with respect to two blocking policies: communication(BBS: Blocking Before Service) and production(BAS: Blocking After Service). Moreover, an optimization problem which determines the minimum shared-buffer capacity satisfying a predetermined QoS(quality of service) is also considered.

• The Transactions of the Korea Information Processing Society
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• v.5 no.1
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• pp.24-32
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• 1998

The bus contention among bus-based shared-memory multiprocessors limits their performance. In addition, under split bus transaction environment, multiprocessors may make some memory requests unnecessary stand by in the memory access buffer, which makes system performance worse. This unnecessary stand-by can be eliminated by maintaining the bitmap table which contains the status bit for each memory block. However, this mechanism requires a great size of SRAM for the status information, which is fully mapped from the whole memory blocks. To solve this problem, we propose a bitmap cache which exploits partial mapping and locality of references. The simulation results show that the proposed system can greatly reduce the capacity of SRAM for the status information with little deteriorating its performance.

• Journal of the Korea Computer Industry Society
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• v.5 no.1
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• pp.101-108
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• 2004

As the dependency to network system and demands of efficient storage systems rapidly grows in every networking filed, the current trends initiated by explosive networked data grow due to the wide-spread of internet multimedia data and internet requires a paradigm shift from computing-centric to data-centric in storagesystems. Furthermore, the new environment of file systems such as NAS(Network Attached Storage) and SAN(Storage Area Network) is adopted to the existing storage paradigm for Providing high availability and efficient data access. We describe the design issues and system components of SANiqueTM, which is the cluster file system based on SAN environment. SANiqueTM has the capability of transferring the user data from the network-attached SAN disk to client applications directly We, especially, present the protocol and functionality of the global buffer manager in our cluster file system.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.12C
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• pp.261-267
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• 2001

This paper presents the architecture of multiple-queue manager for input-queued switch, which has arbitration latency, and the design of the chip. The proposed architecture of multiple-queue manager provides wire-speed routing with a pipelined buffer management, and the tolerance of requests and grants data transmission latency between the input queue manager and central arbiter using a new request control method, which is based on a high-speed shifter. The multiple-input-queue manager has been implemented in a field programmable gate array chip, which provides OC-48c port speed. It enhances the maximum throughput of the input queuing switch up to 98.6% with 128-cell shared input buffer in 16$\times$16 switch size.

• Journal of the Korea Society for Simulation
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• v.12 no.4
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• pp.73-81
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• 2003

An Ad Hoc network is a dynamic multi-hop wireless network that is established by a group of mobile hosts on a shared wireless channel by virtue of their proximity to each other. Since wireless transmissions are locally broadcast in the region of the transmitting host, hosts that are in close proximity can hear each other and are said to be neighbors. The transitive closure of the neighborhood of all the hosts in the set of mobile hosts under consideration forms an Ad Hoc network. Thus, each host is potentially a router and it is possible to dynamically establish routes by chaining together a sequence of neighboring hosts from a source to a destination in the Ad Hoc network. In a network, various real-time services require the network to guarantee the Quality of Services provided to the receiver. End-to-end QoS can be provided most efficiently when each layer of the protocol stack translates the requirements of the application into layer classified requirements and satisfies them. In this study, a mechanism to guarantee the QoS in Ad Hoc networks with buffer nodes is proposed. They effectively prevent traffic congestion and yield better transmission rate. In this way QoS is enhanced.

• Journal of Communications and Networks
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• v.12 no.3
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• pp.275-284
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• 2010

The current multihome-aware protocols (like stream control transmission protocol (SCTP) or parallel TCP for concurrent multipath data transfer (CMT) are not designed for high-capacity and large-latency networks; they often have performance problems transferring large data files over shared long-distance wide area networks. It has been shown that SCTP-CMT is more sensitive to receive buffer (rbuf) constraints, and this rbuf-blocking problem causes considerable throughput loss when multiple paths are used simultaneously. In this research paper, we demonstrate the weakness of SCTP-CMT rbuf constraints, and we then identify that rbuf-blocking problem in SCTP multihoming is mostly due to its loss-based nature for detecting network congestion. We present a simulation-based performance comparison of FAST TCP versus SCTP in high-speed networks for solving a number of throughput issues. This work proposes an end-to-end transport layer protocol (i.e., FAST TCP multihoming as a reliable, delaybased, multihome-aware, and selective ACK-based transport protocol), which can transfer data between a multihomed source and destination hosts through multiple paths simultaneously. Through extensive ns-2 simulations, we show that FAST TCP multihoming achieves the desired goals under a variety of network conditions. The experimental results and survey presented in this research also provide an insight on design decisions for the future high-speed multihomed transport layer protocols.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.4
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• pp.618-636
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• 1997

DQDB(Distributed Queue Dual Bus) protocol, the IEEE 802.6 standard protocol for metropolitan area networks, does not fully take advantage of the capabilities of dual bus architecture. Although fairness in bandwidth distribution among nodes is improved when using so called the bandwidth balancing mechanism, the protocol requires a considerable amount of time to adjust to changes in the network load. Additionally, the bandwidth balancing mechanism leaves a portion of the available bandwidth unused. In a high-speed backbone network, each node may act as a bridge/ router which connects several LANs as well as hosts. However, Because the existence of high speed LANs becomes commonplace, the congestionmay occur on a node because of the limitation on access rate to the backbone network and on available buffer spaces. to release the congestion, it is desirable to install some congestion control algorithm in the node. In this paper, we propose an efficient congestion control mechanism and fair and waster-free MAC protocol for dual bus network. In this protocol, all the buffers in the network can be shared in such a way that the transmission rate of each node can be set proportional to its load. In other words, a heavily loaded node obtains a larger bandwidth to send the sements so tht the congestion can be avoided while the uncongested nodes slow down their transmission rate and store the incoming segments into thier buffers. this implies that the buffers on the network can be shared dynamically. Simulation results show that the proposed probotol significantly reduces the segment queueing delay of a heavily loaded node and segment loss rate when compared with original DQDB. And it enables an attractive high throughput in the backbone network. Because in the proposed protocol, each node does not send a requet by the segment but send a request one time in the meaning of having segments, the frequency of sending requests is very low in the proposed protocol. so the proposed protocol signigificantly reduces the segment queuing dely. and In the proposed protocol, each node uses bandwidth in proportion to its load. so In case of limitation of available buffer spaces, the proposed protocol reduces segment loss rate of a heavily loaded node. Bandwidth balancing DQDB requires the wastage of bandwidth to be fair bandwidth allocation. But the proposed DQDB MAC protocol enables fair bandwidth without wasting bandwidth by using bandwidth one after another among active nodes.

• The KIPS Transactions:PartA
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• v.8A no.4
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• pp.375-384
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• 2001

The shared disk file systems use a technique known as file system journaling to support recovery of metadata on the SAN(Storage Area Network). In the existing journaling technique, the metadata that is dirtied by one host must be updated to disk space before some hosts access it. The system performance is decreased because the disk access number is increased. In this paper, we describe a new recovery technique using a global buffer to decrease disk I/O. It transmits the dirtied metadata into the other hosts through Fibre Channel network on the SAN instead of disk I/O and supports recovery of a critical data by journaling a data as well as metadata.

• The KIPS Transactions:PartD
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• v.11D no.4
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• pp.747-754
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• 2004

Database administrators should be aware of performance characteristics of database systems in order to manage database system effectively. The usages of system resources in database systems could be quite different under database workloads. The objective of this paper is to identify and analyze performance characteristics of database systems in different workloads, which could help database tuners tune database systems Under the TPC-C and TPC-W workloads, which represent typical workloads of online transaction processing and electronic commerce respectively, we investigated usage types of resource that are determined by fourteen performance indicator, and are behaved in response to changes of four tuning parameters (data buffer, private memory, I/O process, shared memory). Eight out of the fourteen performance indicators cleary show the performance differences under the workloads. Changes of data buffer parameter give a influences to database system. The tuning parameter that affects the system performance significantly is the database buffer size in the both workloads.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.5
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• pp.87-97
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• 2016

This work proposes a time-shared 10b DAC based on a two-step resistor string to minimize the effective area of a DAC channel for driving each AMOLED display column. The proposed DAC shows a lower effective DAC area per unit column driver and a faster conversion speed than the conventional DACs by employing a time-shared DEMUX and a ROM-based two-step decoder of 6b and 4b in the first and second resistor string. In the second-stage 4b floating resistor string, a simple current source rather than a unity-gain buffer decreases the loading effect and chip area of a DAC channel and eliminates offset mismatch between channels caused by buffer amplifiers. The proposed 1-to-24 DEMUX enables a single DAC channel to drive 24 columns sequentially with a single-phase clock and a 5b binary counter. A 0.9pF sampling capacitor and a small-sized source follower in the input stage of each column-driving buffer amplifier decrease the effect due to channel charge injection and improve the output settling accuracy of the buffer amplifier while using the top-plate sampling scheme in the proposed DAC. The proposed DAC in a $0.18{\mu}m$ CMOS shows a signal settling time of 62.5ns during code transitions from '$000_{16}$' to '$3FF_{16}$'. The prototype DAC occupies a unit channel area of $0.058mm^2$ and an effective unit channel area of $0.002mm^2$ while consuming 6.08mW with analog and digital power supplies of 3.3V and 1.8V, respectively.