• Korean Journal of Heritage: History & Science
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• v.42 no.2
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• pp.62-85
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• 2009

The Nam-Hae Sin-sa, the South Sea shrine in Yeong-Am, Korea was a national institution for public peace and bliss, was excavated in 2000, and the shrine and the 3-way-gate were reconstructed in 2001. Hae Sin-sa, the Sea shrine is a place for religious service separated into the Nam-Hae Sin-sa, the Dong-Hae Myo, and the Seo-Hae Dan. The Dong-Hae Myo was reconstructed, but restored shrine and 3-way-gate of the Nam-Hae Sin-sa is not perfect in comparison with excavation plan in 2000, therefore new reconstruction was researched through the related literature, the analysis of historical maps and excavation results, the interview with the concerned people and the case study. This research defines the analysis of the Plan of the Nam-Hae Sin-sa Reconstruction as follows. 1. The Nam-Hae Sin-sa was the institution for religious service operated by national direct management, represents the shrine for public peace and bliss on the Mountain, the Sea, and the River. Especially the Nam-Hae Sin-sa had an important position on the pivot of international trade with China and Japan, and had a role of main shrine with another one in the Mt. Ji-ri San. 2. The name of the Sea shrine was called as Nam-Hae Sin-sa(the South Sea shrine), Dong-Hae Myo(the East Sea shrine), Seo-Hae Dan(the West Sea shrine). But the name of the South Sea shrine had changed in the early period of Chosun as Nam-Hae Sin-sa to the later Chosun as Nam-Hae Dang through the research of related literature and historical map. Such as the Seo-Hae Dan, it was constructed for the Dan, the flat raised-floor without buildings, and changed to the type of Sa-Dang with addition of buildings. 3. The historical map of Hae Sin-sa informs the types of the roof, the Mat-bae roof was used in the Dong-Hae Myo, but the Pal-jak roof was showed in the Seo-Hae Dan and the Nam-Hae Sin-sa. 4. According to the analysis of Yong-Ch'uck the unit length, Nam-Hae Sin-sa was reconstructed in the period of Koryo on large scale, but it was restored in the Chosun on middle scale. And the Unit of Yong Ch'uck was changed into Yeong-jo Ch'uck in the period of Chosun. 5. As the results, The Plan of the Nam-Hae Sin-sa Reconstruction designed the new shrine into the 3 Kan front and the 2 Kan side with 3:2 scale. An-ch'o-gong with Yong-du and Yong Mi the ornaments represents head and tail of dragon, the Un-gong and the ornament of Pa-ryun-dae-gong in the building, and the Ch'ung-ryang of the Yong-du show the image of the institution for religious service for the god of the sea who look like dragon. The inner gate building and the main entrance were designed as same plan and scale as Hyang-gyo, the Korean Traditional School and Shrine of Confucianism, on the basis of results of excavation. Raise the 3-tall gate of the main entrance with harmony of the scale and the shape, because the side of gate building has the Mat-bae roof. 6. This research shows that Plan of the Nam-Hae Sin-sa Reconstruction is composed into shrine space and reservation space from the main entrance to inner gate and shrine like Jung-ak Dan in the Mt. Gye-ryong San, and it also informs the well in the west side of Sin-sa is an important factor of the plan of shrine architecture.

• Journal of the Korean Institute of Landscape Architecture
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• v.30 no.4
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• pp.1-8
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• 2002

The place of South Weol Dynastys authorities exhumed in the region of KangChoWu, China lies adjacent to a stone ditch through which water streams crookedly, and a dark trough of stone pond in the north side. There is a sharply curved stone ditch and a crescent-shaped water entrance made by stones. The place was separated by using stone columns and stone walls. There is a beam of ditch, a crooked entrance, a flat bridge of slate, a stepping-stone, a sluice gate, and a crooked corridor. There are big and small artificial islands, and reinforcing stone drainage way in the palace pond recently exhumed at the building site for the pavilion of Hwang-Yong Temple in Kuhwang-Dong, Gyeongju city, Korea. There are four facilities assumed to be entrance and exits at four corners and an open space on which gravel was spread extensively. A narrow road and a middle road with indefinite curves at the south of Asukakyoseki exhumed by the first, second and third and two stone buckets which one is to fill with water and the other is to drain water off like fountain are there, and besides wave protecting dam and north pond and the part that water pass were excavated. Palace ponds that were extensively distributed at old residential cities are a general phenomenon of countries in eastern Asia. Anap pond of Silla and Gungnam pond of Baekje were in Kroea. We believe that Asutnkyoseki is on the extension. Although more investigations in the background of thought and the genealogical relation about the palace pond are required, it seems that an idea was surely received from China.

• Journal of Korea Multimedia Society
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• v.4 no.3
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• pp.257-269
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• 2001

Because of increasing number of integrated circuit, there is many tries of making chip of neural network and some chip is exit. but this is not prefer because YLSI technology can't support so large hardware. So imitation of whole system of neural network is more prefer. There is common procedure in signal processing as in the neural network and pattern recognition. That is multiplication of large amount of signal and reading LUT. This is identical with some operation of MLP, and need iterative and large amount of calculation, so if we make this part with hardware, overall system's velocity will be improved. So in this paper, we design neutral network, not neuron which can be used to many other fields. We realize this part by following separated bits addition method, and it can be appled in the real time parallel process processing.

• Journal of the Korean Institute of Rural Architecture
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• v.3 no.1
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• pp.25-40
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• 2001

In this study, I investigate the formation process of the American presbyterian missionary architecture in Cheong Ju area from 1900 to 1945, which we may think 'the part of Korean modern architecture'. I have examined and analyzed the 18 buildings for the sake of the interpretation with the words of formation process and characteristics . And I can put my idea in order as follows. Firstly, the formation process is 1) buy and modify a Korean style (thatch or tile roofed) building for their need and use it as a gate quaters or house, church, hospital, school, book store, 2) build a Korean style (tile roofed) building and use it-house, hospital, school, 3) build a Western style (timber structured and zinc roofed) building and use it- church, 4) build a Western style (masonry structured and tile or zinc roofed) building and use ithouse, church, school and hospital. Secondly, the characteristics is 1) In the Korean style building, the missionaries change into the function to match with their purpose. they modify the Korean style timber structure by influx of building material-brick, glass, carpet etc. they occupy into the Korean existing residential area. 2) In the Western style building, the missionaries build the house correspond with their living pattern. they build the church with the eclectic of Western and Korean timber frame. and also build the house and hospital with the eclectic of Western and Korean masonry structure. their building located in the isolate hill separated from the existing Korean residential area.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.4 no.3
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• pp.301-306
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• 2003

We have designed embedded web server system and ported Linux operating system version 2.4.1 at our system. And then We implemented to control and monitor widely separated hardware. Web server is the Boa web server with General Public License. We designed for this system using of Cirrus logic's EP7312 ARM core base processor and connecting input and output device at GPIO port of EP7312. Device driver of General purpose I/O for Linux OS is designed. And then the application program controlling driver is implemented to use of common gate interface C language. User is available to control and monitor at client PC. This method have benefit to reduce the Expenditure of hardware design and development time against PC base system and have various and capacious application against firmware base system.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2007.05a
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• pp.473-477
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• 2007

The development of advanced Insulated Gate Bipolar Transistor(IGBT)has enabled high-frequency switching operation and has improved the performance of PWM inverters for motor drive. However, the high rate of dv/dt of IGBT has adverse effects on motor insulation stress. In many motor drive applications, the inverter and motor are separated and it requires long motor feds. The long cable contributes high frequency ringing at the motor terminal and it results in hight surge voltage which stresses the motor insulation. The inverter output filter and RDC snubber are conventional method which can reduce the surge voltage. In this paper, we propose the new low loss snubber to reduce the motor terminal surge voltage. The snubber consists of the series connection of charging/discharging capacitor and the voltage-clamped capacitor. At IGBT turn-off, the snubber starts to operate when the IGBT voltage reaches the voltage-clamped level. Since dv/dt is decreased by snubber operating, the peak level of the surge voltage can be reduced. Also the snubber operates at the IGBT voltage above the voltage-clamped level, the snubber loss is largely reduced comparing with RDC snubber. The proposed snubber enables to reduce the motor terminal surge voltage with low loss.

• Applied Science and Convergence Technology
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• v.24 no.3
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• pp.53-59
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• 2015

The field-effect transistors (FETs) with a graphene-based p-n junction channel were fabricated using the patterned self-assembled monolayers (SAMs). The self-assembled 3-aminopropyltriethoxysilane (APTES) monolayer deposited on $SiO_2$/Si substrate was patterned by hydrogen plasma using selective coating poly-methylmethacrylate (PMMA) as mask. The APTES-SAMS on the $SiO_2$ surface were patterned using selective coating of PMMA. The APTES-SAMs of the region uncovered with PMMA was removed by hydrogen plasma. The graphene synthesized by thermal chemical vapor deposition was transferred onto the patterned APTES-SAM/$SiO_2$ substrate. Both p-type and n-type graphene on the patterned SAM/$SiO_2$ substrate were fabricated. The graphene-based p-n junction was studied using Raman spectroscopy and X-ray photoelectron spectroscopy. To implement low voltage operation device, via ionic liquid ($BmimPF_6$) gate dielectric material, graphene-based p-n junction field effect transistors was fabricated, showing two significant separated Dirac points as a signature for formation of a p-n junction in the graphene channel.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.5
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• pp.46-51
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• 1989

The degradation phenomena induced by hot-carrier injection was studied from the shift of threshold voltage and subthreshold current curve in LDD NMOSFET degraded under different DC stress-biases. Threshold voltage shift ${Delta}V_{tex}$ defined in saturation region was separated into contri butions due to trapped oxide charge $V_{ot}$ and interface traps ${Delta}V_{it}$ generated from midgap to threshold voltage. Under th positive stress electric field (TEX>$V_g>V_d$) condition, the shift of threshold voltage was attributed to the electrons traped ar gate oxide but subthreshold swing was not negative stress electric field ($V_g) condition, holes seems to be injected positive charges so threshold voltage and subthreshold swing were increased.

• Korean Journal of Materials Research
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• v.18 no.3
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• pp.148-152
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• 2008

A new cost-effective atomic layer deposition (ALD) technique, known as Proximity-Scan ALD (PS-ALD) was developed and its benefits were demonstrated by depositing $Al_2O_3$ and $HfO_2$ thin films using TMA and TEMAHf, respectively, as precursors. The system is consisted of two separate injectors for precursors and reactants that are placed near a heated substrate at a proximity of less than 1 cm. The bell-shaped injector chamber separated but close to the substrate forms a local chamber, maintaining higher pressure compared to the rest of chamber. Therefore, a system configuration with a rotating substrate gives the typical sequential deposition process of ALD under a continuous source flow without the need for gas switching. As the pressure required for the deposition is achieved in a small local volume, the need for an expensive metal organic (MO) source is reduced by a factor of approximately 100 concerning the volume ratio of local to total chambers. Under an optimized deposition condition, the deposition rates of $Al_2O_3$ and $HfO_2$ were $1.3\;{\AA}/cycle$ and $0.75\;{\AA}/cycle$, respectively, with dielectric constants of 9.4 and 23. A relatively short cycle time ($5{\sim}10\;sec$) due to the lack of the time-consuming "purging and pumping" process and the capability of multi-wafer processing of the proposed technology offer a very high through-put in addition to a lower cost.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.11
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• pp.914-920
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• 2000

When the charge-trap type SONOS(polysilicon-oxide-nitride-oxide-semiconductor) cells are used to flash memory, the tunneling program/erase condition to minimize the generation of interface traps was investigated. SONOSFET NVSM(Nonvolatile Semiconductor Memory) cells were fabricated using 0.35 ㎛ standard memory cell embedded logic process including the ONO cell process, based on retrograde twin-well, single-poly, single metal CMOS(Complementary Metal Oxide Semiconductor) process. The thickness of ONO triple-dielectric for the memory cell is tunnel oxide of 24 $\AA$, nitride of 74 $\AA$, blocking oxide of 25 $\AA$, respectively. The program mode(V$\_$g/=7, 8, 9 V, V$\_$s/=V$\_$d/=-3 V, V$\_$b/=floating) and the erase mode(V$\_$g/=-4, -5, -6 V, V$\_$s/=V$\_$d/=floating, V$\_$b/=3 V) by MFN(Modified Fowler-Nordheim) tunneling were used. The proposed programming condition for the flash memory of SONOSFET NVSM cells showed less degradation(ΔV$\_$th/, S, G$\_$m/) characteristics than channel MFN tunneling operation. Also, the program inhibit conditins of unselected cell for separated source lines NOR-type flash memory application were investigated. we demonstrated that the phenomenon of the program disturb did not occur at source/drain voltage of 1 V∼12 V and gate voltage of -8 V∼4 V.