• 반도체디스플레이기술학회지
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• 제11권1호
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• pp.73-78
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• 2012

In this study, the optimal process condition was induced about the pillar arrangement process of applying the screen printing method in the manufacture process of vacuum glazing panel. The high precision screen printing is technology which pushes out the paste and spreads it by using the squeegee on the stainless steel plate in which the pattern is formed. The screen printing method is much used in the flat panel display field including the LCD, PDP, FED, organic EL, and etc for forming the high precision micro-pattern. Also a number of studies of screen printing method have been conducted as the method for the cost down through the improvement of productivity. The screen printing method has many parameters. So we used Taguchi method in order to decrease test frequencies and optimize this parameters efficiently. In this study, experiments of pillar arrangement were performed by using Taguchi experimental design. We analyzed experimental results and obtained optimal conditions which are 4 m/s of squeegee speed, $40^{\circ}$ of squeegee angle and distance between metal mask and glass.

• 반도체디스플레이기술학회지
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• 제10권4호
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• pp.101-106
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• 2011

There are various methods in the flat panel display manufacture. The cost reduction effect is very big in case of using the screen printing method. The screen printing method is much used in the process of forming PDP barrier and can apply to the process of arranging the pillars for maintaining the vacuum gap of the vacuum glazing panel. The pillar which is one of the core elements for comprising vacuum glazing maintains the vacuum gap overcoming the vacuum pressure difference with the atmospheric pressure generated in vacuum glazing. At the same time, the deformation phenomenon by vacuum pressure is relived. In this paper, by using FEM about three considered in the pillar design and arrangement kinds of limiting factors, the simulation was performed. The pillar optimum arrangement method at within the maximum allowable tensile stress and heat transfer coefficients according to the arrangement try to be presented based upon the analyzed result data review and this validity tries to be verified by FEM.

• 반도체디스플레이기술학회지
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• 제7권4호
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• pp.19-22
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• 2008

Thin film has been an increasing important subject of intensive research, owing to the fact that these films possess desirable optical, electrical and electrochemical properties for uses in many semi-conducting nano-crystal applications, such as light-emitting diodes, lasers and solar cell applications. Here, ZnSe thin films were deposited by electrochemical method for the applications of light emitting diode. Electrochemical deposition of ZnSe thin film is not easy, because of the high difference of reduction potential between zinc ion and selenium acid. In order to handle the band gap of ZnSe crystal thin films easily, electrochemical methods are promising to manufacture these films economically. Therefore we have investigated the present study to characterize zinc selenide thin films deposited on ITO glass plates electrochemically. The luminescent properties of ZnSe films have been evaluated by UV-Vis spectrometer and luminescence spectrometer. And the morphology of the film surface has been discussed qualitatively from SEM images.

• 한국표면공학회지
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• 제48권1호
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• pp.23-26
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• 2015

What causes the transformation of a solar cell is the behavior difference of thermal expansion occurred between the substrate and the layer of semiconductor used in the solar cell. Therefore, the substrate has to possess a behavior of thermal expansion that is similar with that of semiconductor layer. This study employed electroforming to manufacture Fe-Ni alloy materials of different compositions. To verify the result from a finite element analysis, a two-dimensional Mo substrate was calculated and its verification experiment was conducted. The absolute values from the finite element analysis of Mo/substrate structure and its verification experiment showed a difference. However, the size of residual stress of individual substrate compositions had a similar tendency. Two-dimensional CIGS/Mo/$SiO_2$/substrate was modeled. Looking into the residual stress of CIGS layer occurred while the temperature declined from $550^{\circ}C$ to room temperature, the smallest residual stress was found with the use of Fe-52 wt%Ni substrate material.

• 반도체디스플레이기술학회지
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• 제18권2호
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• pp.11-16
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• 2019

The four different polymer compounds were manufactured with the two kinds of plasticizers [(di-2-ethylhexyl sebacate(DOS), and di-2-butyl sebacate(DBS)] and two different additive amounts(18, 26 phr) of the same plasticizer for making cable sheath for ship. Ethylene-vinylacetate, ethylene-propylene-diene-copolymer as matrix polymers and ethylene-vinylacetate grafted maleic anhydride as coupling agent were selected for compounding with fire retardant, closslinking agent, filler, and other additives besides plasticizer. The compound including DOS showed the higher ${\Delta}T$ than that including DBS at the same additive amount in the rheology test. And with increasing plasticizer, the compounds resulted in lower tensile strength and higher elongation by lubricating effect of plasticizer. DOS yielded better aging resistance and cold resistance than DBS due to the good heat resistance and low solidifying point of DOS compared to DBS.

• 한국산업융합학회 논문집
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• 제7권3호
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• pp.259-263
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• 2004

In the manufacture progress of LCD or semiconductor, there are used many kinds of gas like erosion gas, dilution gas, toxic gas as a progress which used these gas there are required high puritize to increase accumulation rate of semiconductor or LCD materials work progress of semiconductor or LCD it demand many things like the material which could minimize metallic dust that could be occured by reaction between gas and transfer pipe laying material, illumination of the surface, emition of the gas, metal liquation, welding etc also demand quality geting stricted. Material-Low-sulfur-contend (0.007-0010), vacuum-arc-remelt(VAR), seamless, high-purity tubing material is recommend for enhance welding lower surface defect density All wetted stainless steel surface must be 316LSS elecrto polishinged with ${\leq}0.254{\mu}m$($10.0{\mu}in$) Ra average surface finish, $Cr/Fe{\geq}1.1$ and $Cr_2O_3$ thickness ${\geq}25{\AA}$ From the AES analytical the oxide layer thickness (23.5~36 angstroms silicon dioxide equivalent) and chromum to iron ratios is similar to those generally found on electropolished stainless steel., molybdenum and silicon contaminants ; elements characteristic of stainless steel (iron, nickel and chromium); and oxygen were found on the surface Phosphorus and nitrogen are common contaminants from the electropolish and passivation steps.

• 한국멀티미디어학회논문지
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• 제3권4호
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• pp.407-415
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• 2000

설비 집약적이며 복잡한 생산 시스템중의 하나인 반도체 FAB 공정은 제품의 흐름시간과 대기시간, 공정 중 재고를 줄이는 것이 흐름제어의 가장 중요한 목표이다. 이에 본 연구에서는 소품종 다랑 생산 시스템에서 발생하는 비경제성을 줄이고 생산성을 향상시키기 위하여 현재 반도체 양산 회사에서 주로 채택하고 있는 In-Line Layout을 분석하고 새로운 제안 방식인 그룹테크놀로지를 이용한 Job Shop 형태의 Stand Alone Layout과 함께 각각의 모델로 구축하고 시뮬레이션 함으로써 일별 생산 계획상의 회수 변화에 따른 각Layout의 특성을 비교, 분석하였다. 이 때 사용한 시뮬레이션 툴은 모델 구축 및 시뮬레이션이 용이하고 범용적인 (이산형 제조 시스템용) ProSys를 사용하였다. 연구 결과로는 일별 생산 계획상의 회수 초기에는 In-Line Layout이 Stand Alone Layout보다 대체로 생산량 측면에서 우세하지만 일별 생산계획상의 회수가 증가된 14회부터는 Stand Alone Layout이 더 우세한 것으로 나타났다

• 전기전자학회논문지
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• 제23권1호
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• pp.330-333
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• 2019

실리콘 태양전지와 비교해 제조비용이 저렴하고 뛰어난 안정성을 가지고 있는 염료 감응 태양전지에 관한 다양한 연구가 지속적으로 이루어지고 있다. 본 연구에서는 $TiO_2$와 $Nb_2O_5$을 혼합하여 만든 반도체 산화물을 사용하여 염료 감응 태양전지의 특성을 연구하였다. $Nb_2O_5$을 서로 다른 비율로 첨가하여 태양전지를 제작하였고, 이에 따른 표면적, 전기적 특성을 측정하였다. $Nb_2O_5$가 첨가될수록 염료 및 전해질의 접촉 면적이 증가하게 되었고, 이에 따라 염료 감응 태양전지의 단락 전류, 개방전압, 곡선인자 및 변환 효율이 개선됨을 확인하였다.

• 반도체디스플레이기술학회지
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• 제20권1호
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• pp.32-36
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• 2021

The number of processes in the manufacture of semiconductors, displays and solar cells is increasing. And as the processes is performed, multiple layers of films and various patterns are formed on the wafer. At this time, substrate warpage occurs due to the difference in stress between each film and pattern formed on the wafer. the substrate warping phenomenon occurs due to the difference in stress between each film and pattern formed on the wafer. We developed a new warpage measurement method to measure wafer warpage during real-time processing. We performed an experiment to measure the presence and degree of warpage of the substrate in real time during the process by adding only measurement equipment for applying additional electrical signals to the existing ESC and detecting the change of the additional electric signal. The additional electrical measurement signal applied at this time is very small compared to the direct current (DC) power applied to the electrostatic chuck whit a frequency that is not generally used in the process can be selectively used. It was confirmed that the measurement of substrate warpage can be easily separated from other power sources without affecting.

• 한국정밀공학회지
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• 제16권1호통권94호
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• pp.18-25
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• 1999

Chipping is an unavoidable phenomenon in the slot grinding process of hard and brittle materials. However, it should be reduced for the improvement of surface integrity in the manufacture of optical and semiconductor components. Electrolytic In-process Dressing (ELID) technique for metal bonded superabrasive grinding wheel has been developed for mirror surface grinding of hard and brittle materials. Electrically dressed wheel surface has sharply exposed abrasives and results in lower grinding force, higher grinding efficiency in grinding. The paper deals with a newly developed method for slot grinding using ELID and was implemented to improve grooved surface quality and decreases chipping size on the edge of the groove. As a result, we accomplished chipping-free grooves and obtained the clear ground surfaces on glass and WC.