• Title/Summary/Keyword: Semiconductor Defect

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Optimization Of CMP for $SiO_2$ Thin Film with a Control of Temperature in Pad Conditioning Process (패드 컨디셔닝시 온도조절을 통한 산화막 CMP 최적화)

  • Choi, Gwon-Woo;Park, Sung-Woo;Kim, Nam-Hoon;Chang, Eui-Goo;Seo, Yong-Jin;Lee, Woo-Sun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.11a
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    • pp.731-734
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    • 2004
  • As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric(IMD) layer with free-defect. Polishing pads play a key role in CMP, which has been recognized as a critical step to improve the topography of wafers for semiconductor fabrication. It is investigated the performance of $SiO_2-CMP$ process using commercial silica slurry as a pad conditioning temperature increased after CMP process. This study also showed the change of SEM images in the pore geometry on the CMP pad surface after use with a different pad conditioning temperature.

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Development of Wafer Bond Integrity Inspection System Based on Laser Transmittance

  • Jang, Dong-Young;Ahn, Hyo-Sok;Mehdi, Sajadieh.S.M.;Lim, Young-Hwan;Hong, Seok-Kee
    • Journal of the Microelectronics and Packaging Society
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    • v.17 no.2
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    • pp.29-33
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    • 2010
  • Among several critical topics in semiconductor fabrication technology, particles in addition to bonded surface contaminations are issues of great concerns. This study reports the development of a system which inspects wafer bond integrity by analyzing laser beam transmittance deviations and the variations of the intensity caused by the defect thickness. Since the speckling phenomenon exists inherently as long as the laser is used as an optical source and it degrades the inspection accuracy, speckle contrast is another obstacle to be conquered in this system. Consequently speckle contrast reduction methods were reviewed and among the all remedies have been established in the past 30 years the most adaptable solution for inline inspection system is applied. Simulation and subsequently design of experiments has been utilized to discover the best solution to improve irradiance distribution and detection accuracy. Comparison between simulation and experimental results has been done and it confirms an outstanding detection accuracy achievement. Bonded wafer inspection system has been developed and it is ready to be implemented in FAB in the near future.

Three-dimensional Modeling of Transient Enhanced Diffusion (과도 증속 확산(TED)의 3차원 모델링)

  • 이제희;원태영
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.6
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    • pp.37-45
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    • 1998
  • In this paper, we report the first three-dimensional simulation result of the transient enhanced diffusion(TED) of dopants in the ion-implanted silicon by employing our 3D semiconductor process simulator, INPROS system. In order to simulate three-dimensional TED redistribution of dopants in silicon, the dopant distributions after the ion implantation was calculated by Monte Carlo(MC) method, followed by finite element(FE) numerical solver for thermal annealing. Excellent agreement between the simulated 3D profile and the SIMS data has been obtained for ion-implanted arsenic and phosphorus after annealing the boron marker layer at 75$0^{\circ}C$ for 2 hours. Our three-dimensional TED simulation could successfully explain the reverse short channel effect(RSCE) by taking the 3D point defect distribution into account. A coupled TED simulation and device simulation allows reverse short channel effect on threshold to be accurately predicted.

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Effects of Co-Ti Addition on the Sintering Characteristics of (Ti1-xAlx)N Ntride Powder ((Ti1-xAlx)N계 질화물의 소결특성에 미치는 Co, Co-Ti 금속결합제의 영향)

  • Lee, Young-Ki;Sohn, Young-Un
    • Journal of the Korean Society for Heat Treatment
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    • v.11 no.3
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    • pp.177-185
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    • 1998
  • The purpose of this research is to investigate the effects of Co, Co-Ti addition on the sintering characteristic of $(Ti_{1-x}Alx)N$ material synthesized by the direct nitriding method for a application as a cermet material. The observed shrinkage rates of $(Ti_{1-x}Alx)N$ pellets increase with the additive (Co, Co-Ti) content, temperature and time, and also the pellets with the same additive content exhibit the shrinkage behavior that depends on the Ti/Al ratio. However, although the shrinkage rates in this study is the mast higher (36%), the density of the sintered $(Ti_{1-x}Alx)N$ pellet is below 80% density in theory because of the partial segregation and the dense band defect of AlCo compound. Consequentely, it is considered that Co was not effective as a binder material because the wettability of liquid Co metal on $(Ti_{1-x}Alx)N$ materials is poor, In $(Ti_{1-x}Alx)N$ with Ti-Co additive, the stoichiometric TiN is transformed by the under-stoichiometric TiNx(x<1.0) during sintering, leading to the good properties such as hardnees and hot oxidation.

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The Cu-CMP's features regarding the additional volume of oxidizer to W-Slurry (W-slurry의 산화제 첨가량에 따른 Cu-CMP특성)

  • Lee, Woo-Sun;Choi, Gwon-Woo;Seo, Young-Jin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07a
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    • pp.370-373
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    • 2003
  • As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric(IMD) layer with free-defect. However, as the IMD layer gets thinner, micro-scratches are becoming as major defects. Chemical-Mechanical Planarization(CMP) of conductors is a key process in Damascene patterning of advanced interconnect structure. The effect of alternative commerical slurries pads, and post-CMP cleaning alternatives are discuess, with removal rate, scratch dentisty, surface roughness, dishing, erosion and particulate density used as performance metrics. Electroplated copper depostion is a mature process from a historical point of view, but a very young process from a CMP persperspective. While copper electrodepostion has been used and stuidied for dacades, its application to Cu damascene wafer processing is only now ganing complete accptance in the semiconductor industry. The polishing mechanism of Cu CMP process has been reported as the repeated process of passive layer formation by oxidizer and abrasion action by slurry abrasives. however it is important to understand the effect of oxidizer on copper pasivation layer in order to obtain higher removal rate and non-uniformity during Cu-CMP process. In this paper, we investigated the effects of oxidizer on Cu-CMP process regarding the additional volume of oxidizer.

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A study on Optical Element Pick-up Mechanism of Ultrasonic Transport System (초음파 이송 장치의 광소자 픽업 메커니즘에 관한 연구)

  • Jeong S.H.;Kim G.H.;Shin S.M.;Lee S.H.;Kim J.H.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2006.05a
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    • pp.327-328
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    • 2006
  • Recently, as the infocomindustry is developed, the semiconductor industry as well as the optical industry such as the optical communication and the optical instrument is developed rapidly. The transmission, storage and processing of information has been reaching an limit because amounts of information increase rapidly. The more quickly the optical communication is developed, the more sharply the demand of optical elements increase. The transport and inspection process is time consuming and the error rate is high, because this process are not automated in case of an optical lens. In this paper, the pick-up system that can hold optical elements and be transferred by the ultrasonic transport system is developed. The inspection system that distinguishes between the existence and the nonexistence of a defect is connected easily to pick-up system. The pick-up system separates the optical glass lens by results of the inspection. The automation program is developed by visual c++ programming.

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Atomic-Layer Etching of High-k Dielectric Al2O3 with Precise Depth Control and Low-Damage using BCl3 and Ar Neutral Beam

  • Kim, Chan-Gyu;Min, Gyeong-Seok;Yeom, Geun-Yeong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.114-114
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    • 2012
  • Metal-oxide-semiconductor field-effect transistors (MOSFETs)의 critical dimension (CD)가 sub 45 nm로 줄어듬에 따라 기존에 gate dielectric으로 사용하고 있는 SiO2에서 발생되는 high gate leakage current 때문에 새로운 high dielectric constant (k) 물질들이 연구되기 시작하였다. 여러 가지 high-k 물질 중에서, aluminum-oxide (Al2O3)는 높은 dielectric constant (~10)와 전자 터널링 barrier height (~2eV) 등을 가지기 때문에 많은 연구가 되고 있다. 그러나 Al2O3를 anisotropic한 patterning을 하기 위해 주로 사용되고 있는 halogen-based 플라즈마 식각 과정에서 나타나는 Al2O3와 하부 layer간의 낮은 식각 selectivity 뿐만 아니라 표면에 발생되는 defect, stoichiometry modification, roughness 변화 등의 많은 문제점들로 인하여 device performance가 감소하기 때문에 이를 해결하기 위한 많은 연구들이 진행중이다. 따라서 본 연구에서는 실리콘 기판위의 atomic layer deposition (ALD)로 증착된 Al2O3를 BCl3/Ar 중성빔을 이용하여 원자층 식각한 후 식각 특성을 분석해 보았다. Al2O3 표면을 BCl3로 absorption시킨 후 Ar 중성빔으로 desorption 시키는 과정에서 volatile한 aluminum-chlorides와 boron oxychloride가 형성되어 layer by layer로 제거됨을 관찰 할 수 있었다.

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Application of ultra pure water in semiconductor wet cleaning process (반도체 세정 공정에서의 초순수)

  • 송재인;박흥수;고영범;이문용
    • Proceedings of the Membrane Society of Korea Conference
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    • 1996.06a
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    • pp.149-153
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    • 1996
  • 반도체 소자 제조 공정이 고 집적화 됨에 따라 습식 세정방법에 의한 세정공정의 중요성이 더욱 증가 되어지고 있으며, 특히 그 중에서 전체 세정공정의 약 절반을 차지하고 있는 Deionised water에 의한 rinsing 공정의 경우 ultrapure water의 quality가 최근 지속적으로 향상이 되어짐에 따라 많은 발전을 자져 왔다. 일반적으로 Deionised water에 함유하고 있는 TOC(total oxidisable components), bacteria, metallic impurity, desolved oxygen cencentration, colloidal material impurity (예를 들면 Silica, oraganic substrate)등은 ultra pure water의 quality를 결정하는데 매우 중요한 factor로 작용하고 있으며, 이러한 불순물들이 반도체 제조공정중 wafer surface에 흡착되어 졌을때 여러형태의 defect들을 유발한다고 알려져 있다. 그러나 pseudommonas, flavobacterlum, alcaligene등의 기 얄려진 bacteria들의 경우 Deionised water를 supply해주는 배관의 Inner surface에 잘 흡착 되지만 고온의 water 혹은 과산화수소수($H_{2}O_{2}$) 를 이용하여 주기적으로 처리 해줌으로 인하여 이에 대한 문제점을 어느정도 최소화 시킬수 있다. 위의 두가지 방법중 전자의 경우 chemical을 사용하지 않고, 유지 및 관리가 간편하며, 용존산소량을 줄일수 있다는 점에서 장점이 있으나, 전 ultra pure water의 system이 열적으로 안정해야 하고 경제적인 문제가 수반하는 단점을 가지고 있다. 후자의 경우, 미량의 과산화수소수 (1~10,000 ppm)를 이용해 처리 해주는 방법의 경우 경제적으로 큰 장점이 있고, 처리가 단순하다는 장점이 있으나 과산화수소수 자체에 포함하고 있는 높은 impurit level, 그리고 처리후 장시간의 flushing time을 가져야 한다는 단점등이 존재 하고 있다.

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Structural Control of Single-Crystalline Metal Oxide Surfaces toward Bioapplications

  • Ogino, Toshio
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.112-112
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    • 2013
  • Well-defined surfaces of single-crystalline solid materials are starting points of self-organizationof nanostructures and chemical reactions controlled in nanoscale. Although highly ordered atomicarrangement can be obtained on semiconductor surfaces, they can be maintained only in vacuumand not in air or in aqueous environment. Since single-crystalline metal oxide surfaces arechemically stable and no further oxidation occurs, their atomic structures can be utilized fornanofabrication in liquid processes, nanoelectrochemistry and nanobiotechnology. Sapphire is oneof the most stable metal oxides and its crystalline quality is excellent, as can be applied to electronicdevices that require ultralow defect densities. We recently found that chemical phase separationoccurs on sapphire surfaces by annealing processes and the formed nanodomains exhibit specificproperties in air and in water [1,2]. In our experiments, highly selective and controllable adsorptionof various protein molecules is observed on the phase-separated surfaces though the materials andcrystallographic orientations are identical [3,4]. Planar lipid bilayers supported on thephase-separated sapphire surface also exhibit a specific formation site selectivity [5]. Chemicalnanodomains appear on other metal-oxide surfaces, such as well-ordered titania surfaces. Wedemonstrate that surface chemistry of the nanodomains can be characterized in aqueousenvironment using atomic force microscopy equipped with colloidal tips and then show adsorptionand desorption behaviors of various proteins on the phase-separated surfaces.

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Studies for Improvement in SiO2 Film Property for Thin Film Transistor (박막트랜지스터 응용을 위한 SiO2 박막 특성 연구)

  • Seo, Chang-Ki;Shim, Myung-Suk;Yi, Junsin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.6
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    • pp.580-585
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    • 2004
  • Silicon dioxide (SiO$_2$) is widely used as a gate dielectric material for thin film transistors (TFT) and semiconductor devices. In this paper, SiO$_2$ films were grown by APCVD(Atmospheric Pressure chemical vapor deposition) at the high temperature. Experimental investigations were carried out as a function of $O_2$ gas flow ratios from 0 to 200 1pm. This article presents the SiO$_2$ gate dielectric studies in terms of deposition rate, refrative index, FT-IR, C-V for the gate dielectric layer of thin film transistor applications. We also study defect passivation technique for improvement interface or surface properties in thin films. Our passivation technique is Forming Gas Annealing treatment. FGA acts passivation of interface and surface impurity or defects in SiO$_2$ film. We used RTP system for FGA and gained results that reduced surface fixed charge and trap density of midgap value.