• Journal of the Korean Society for Precision Engineering
• /
• v.27 no.6
• /
• pp.32-38
• /
• 2010

Laser material processing technology is adopted in several industry as alternative process which could overcome weakness and problems of present adopted process, especially semiconductor and display industry. In semiconductor industry, laser photo lithography is doing at front-end level, and cutting, drilling, and marking technology for both wafer and EMC mold package is adopted. Laser cleaning and de-flashing are new rising technology. There are 3 kinds of main display industry which use laser technology - TFT LCD, AMOLED, Touch screen. Laser glass cutting, laser marking, laser direct patterning, laser annealing, laser repairing, laser frit sealing are major application in display industry.

• Korean Journal of Materials Research
• /
• v.25 no.9
• /
• pp.462-467
• /
• 2015

Pellicle is defined as a thin transparent film stretched over an aluminum (Al) frame that is glued on one side of a photomask. As semiconductor devices are pursuing higher levels of integration and higher resolution patterns, the cleaning of the Al flame surface is becoming a critical step because the contaminants on the Al flame can cause lithography exposure defects on the wafers. In order to remove these contaminants from the Al frame, a highly concentrated nitric acid ($HNO_3$) solution is used. However, it is difficult to fully remove them, which results in an increase in the Al surface roughness. In this paper, the pellicle frame cleaning is investigated using various cleaning solutions. When the mixture of sulfuric acid ($H_2SO_4$), hydrofluoric acid (HF), hydrogen peroxide ($H_2O_2$), and deionized water with ultrasonic is used, a high cleaning efficiency is achieved without $HNO_3$. Thus, this cleaning process is suitable for Al frame cleaning and it can also reduce the use of chemicals.

• Clean Technology
• /
• v.7 no.1
• /
• pp.13-25
• /
• 2001

With fast advancement of fine machineries and semiconductor industries in recent decades, the ultra-cleaning of organic chemicals, submicron particles from contaminated unit equipments and products such as silicon wafers becomes one of the most important steps for further advancement of such industries. To date, two kinds of ultra cleaning techniques are used; one is the wet-cleaning and the other is the dry cleaning. In case of wet cleaning, removal of organic contaminants and submicron particles is made by DIW with additives such as $H_2O_2$, $H_2SO_4$, HCl, $NH_4OH$ and HF, etc. While the wet cleaning method is most widely adopted for various occasions, it is inevitable to discharge significant amount of toxic waste waters in environment. Dry cleaning is an alternative method to mitigate environmental pollution of the wet cleaning with maintaining comparable degree of cleaning to the wet cleaning. Although there are various concept of dry cleaning have been devised, the dry cleaning with environmentally-benign solvent such as carbon dioxide proven to show high degree of cleaning from the contaminated porous surface as well as from the bare surface. Thus, special global attention has been placing on this technique since it has important advantages of simple process schemes and no environmentally concern, etc. Thus, this article critically reviews the state-of-the-art of the supercritical fluid drying with emphasis on the thermo-physical characteristics of the supercritical solvent, environmental gains compared to other dry cleaning methods, and the generic aspects of the basic design and processing engineering.

• Korean Journal of Materials Research
• /
• v.22 no.9
• /
• pp.459-464
• /
• 2012

We investigated cleaning effects using $NH_4OH$ solution on the surface of Cu film. A 20 nm Cu film was deposited on Ti / p-Si (100) by sputter deposition and was exposed to air for growth of the native Cu oxide. In order to remove the Cu native oxide, an $NH_4OH$ cleaning process with and without TS-40A pre-treatment was carried out. After the $NH_4OH$ cleaning without TS-40A pretreatment, the sheet resistance Rs of the Cu film and the surface morphology changed slightly(${\Delta}Rs:{\sim}10m{\Omega}/sq.$). On the other hand, after $NH_4OH$ cleaning with TS-40A pretreatment, the Rs of the Cu film changed abruptly (${\Delta}Rs:till{\sim}700m{\Omega}/sq.$); in addition, cracks showed on the surface of the Cu film. According to XPS results, Si ingredient was detected on the surface of all Cu films pretreated with TS-40A. This Si ingredient(a kind of silicate) may result from the TS-40A solution, because sodium metasilicate is included in TS-40A as an alkaline degreasing agent. Finally, we found that the $NH_4OH$ cleaning process without pretreatment using an alkaline cleanser containing a silicate ingredient is more useful at removing Cu oxides on Cu film. In addition, we found that in the $NH_4OH$ cleaning process, an alkaline cleanser like Metex TS-40A, containing sodium metasilicate, can cause cracks on the surface of Cu film.

• Korean Chemical Engineering Research
• /
• v.47 no.6
• /
• pp.688-694
• /
• 2009

A spray-type cleaning agent in utilizing dust-remover on PCB was chosen to study the cleanliness test and efficiency. In order to choose alternative environmental-friendly cleaning agents, it is important that the systematic selection procedures should be introduced and applied through the evaluation of their cleaning ability, environmental characteristics, and economical factors, and that the objective and effective evaluation methods of cleanliness should be established for the industry. A novel cleaning evaluation method with scanning electron microscopy/energy-dispersive X-ray analysis of surface observation evaluation method and an infra-red thermography camera(THERMOVISION A20 model) was studied in this work. The sound card(CT-2770 model) cut by $2{\times}2cm$ size was used as a part, and before and after the spray cleaning, the cleanliness was observed by the image analyzer of SEM and further the removal efficiency of dust was quantitatively evaluated by the component analysis of EDX. For the parts of P4TE model motherboard and IPC-A-36 PCB plate, before and after the spray cleaning, temperature differences were measured and compared at room temperature and 50 oven temperature by an infra-red thermography camera in the contaminants of dust and iron powder.

• Korean Chemical Engineering Research
• /
• v.59 no.4
• /
• pp.632-638
• /
• 2021

With the copper interconnection in the semiconductor process, complex residues including copper oxide, fluoride, and polymeric fluorocarbon are formed by plasma etching. In this study, a cleaning solution was prepared with a component having an amine group (-NH₂) and a carboxyl group (-COOH), and the characteristics of removing post-etch residues in the copper wiring process were analyzed. In the cleaning solution containing an amine group, the length of the component substituted with nitrogen and the length of the carbon chain influenced the cleaning effect, and the etching rate of copper oxide increased as the pH of the cleaning solution increased. The activity of the amine group is in the basic region, and the activity of the carboxyl group is in the acidic region, and the cleaning process proceeds through complex formation with copper or copper oxide in each region.

• Journal of Korean Society of Occupational and Environmental Hygiene
• /
• v.33 no.4
• /
• pp.419-426
• /
• 2023

Objectives: This study aims to develop an Occupational Safety and Health (OSH) guide for the safe cleaning of contaminated machinery, equipment, and parts used in the electronics manufacturing process. Methods: A literature review, field investigations, and discussions were conducted. An initial draft of an OSH guide was developed and reviewed by experts with significant experience in maintenance work in the electronics manufacturing process in order to refine the guide. Results: Workers involved in cleaning processes with chemicals, solvents, and abrasive blasting can face exposure to a wide range of chemicals, abrasives, and noise. Identifying potential risks associated with each cleaning technique was an essential first step toward enhancing safety measures. The OSH guide comprises approximately eleven to twelve sections spanning 20-25 pages. It includes engineering and administrative protocols systematically organized to address the necessary actions before, during, and after cleaning tasks, depending on the technique. It is recommended that airline respirator masks be used in conjunction with an air purification system to ensure adherence to air quality standard "D" for atmosphere level. The use of an oil-free air compressor is advised, preferably a stationary model that does not rely on fuel sources like diesel. Conclusions: This OSH guide is designed to protect workers involved in maintenance activity in the electronics industry and aligns with global standards, such as those from the International Organization for Standardization (ISO) and Semiconductor Equipment and Material International, ensuring a higher level of safety and compliance.

• Proceedings of the International Microelectronics And Packaging Society Conference
• /
• 2000.04a
• /
• pp.57-64
• /
• 2000

As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology fur their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electrodes nickel, solder jetting, stud bumping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.

• Journal of the Microelectronics and Packaging Society
• /
• v.7 no.1
• /
• pp.51-59
• /
• 2000

As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology for their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electroless nickel, solder jetting, stud humping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. Research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.

• Journal of the Semiconductor & Display Technology
• /
• v.7 no.3
• /
• pp.17-21
• /
• 2008

Application of flash memory in mobile and ubiquitous related devices is rapidly being increased due to its low price and high performance. In addition, some notebook computers currently come out into market with a SSD(Solid State Disk) instead of hard-drive based storage system. Regarding this trend, applications need to increase the storage capacity using multiple flash memory chips for larger capacity sooner or later. Flash memory based storage subsystem should resolve the performance bottleneck for writing in perspective of speed and lifetime according to its physical property. In order to make flash memory storage work with tangible performance, reclaiming of invalid regions needs to be controlled in a particular manner to decrease the number of erasures and to distribute the erasures uniformly over the whole memory space as much as possible. In this paper, we study the performance of flash memory recycling algorithms and demonstrate that the proposed algorithm shows acceptable performance for flash memory storage with multiple chips. The proposed cleaning method partitions the memory space into candidate memory regions, to be reclaimed as free, by utilizing threshold values. The proposed algorithm handles the storage system in multi-layered style. The impact of the proposed policies is evaluated through a number of experiments.