• 한국정밀공학회지
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• 제27권6호
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• pp.32-38
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• 2010

Laser material processing technology is adopted in several industry as alternative process which could overcome weakness and problems of present adopted process, especially semiconductor and display industry. In semiconductor industry, laser photo lithography is doing at front-end level, and cutting, drilling, and marking technology for both wafer and EMC mold package is adopted. Laser cleaning and de-flashing are new rising technology. There are 3 kinds of main display industry which use laser technology - TFT LCD, AMOLED, Touch screen. Laser glass cutting, laser marking, laser direct patterning, laser annealing, laser repairing, laser frit sealing are major application in display industry.

• 한국재료학회지
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• 제25권9호
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• pp.462-467
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• 2015

Pellicle is defined as a thin transparent film stretched over an aluminum (Al) frame that is glued on one side of a photomask. As semiconductor devices are pursuing higher levels of integration and higher resolution patterns, the cleaning of the Al flame surface is becoming a critical step because the contaminants on the Al flame can cause lithography exposure defects on the wafers. In order to remove these contaminants from the Al frame, a highly concentrated nitric acid ($HNO_3$) solution is used. However, it is difficult to fully remove them, which results in an increase in the Al surface roughness. In this paper, the pellicle frame cleaning is investigated using various cleaning solutions. When the mixture of sulfuric acid ($H_2SO_4$), hydrofluoric acid (HF), hydrogen peroxide ($H_2O_2$), and deionized water with ultrasonic is used, a high cleaning efficiency is achieved without $HNO_3$. Thus, this cleaning process is suitable for Al frame cleaning and it can also reduce the use of chemicals.

• 청정기술
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• 제7권1호
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• pp.13-25
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• 2001

정밀 기계산업과 반도체 산업의 진보와 더불어 대상물의 초순도 세정이 하이테크 산업발전에 가장 중요한 핵심기술로 부각되고 있다. 현재 초순수 세정은 크게 습식세정과 건식세정으로 분류하고 있다. 습식세정의 경우 오랜 경험과 높은 세정효율을 보이고 있지만, 다량의 탈이온수에 과산화수소, 황산, 불산 또는 수산화 암모늄 등의 독성첨가제를 반복적으로 사용하고 있어 독성 폐수발생등 심각한 환경오염을 유발하고 있다. 따라서, 최근에는 습식 세정에 따른 환경오염의 문제를 개선하기 위한 노력으로 몇 가지 건식 세정기술이 개발되고 있다. 최근 들어 건식세정 방법 중에 소위 초임계상태의 환경 용매를 사용하는 기술이 개발되고 있으며, 높은 세정효율과 더불어 환경친화성이 높은 유망한 기술로 받아들여지고 있어 국제적인 관심이 집중되고 있다. 이 논문에서는 초임계 이산화탄소 세정에 관심을 두어, 초임계 용매의 물리화학적 특성과 환경친화측면, 세정공정의 엔지니어링, 그리고 국내외 기술 현황을 종합적으로 분석 평가하였다.

• 한국재료학회지
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• 제22권9호
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• pp.459-464
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• 2012

We investigated cleaning effects using $NH_4OH$ solution on the surface of Cu film. A 20 nm Cu film was deposited on Ti / p-Si (100) by sputter deposition and was exposed to air for growth of the native Cu oxide. In order to remove the Cu native oxide, an $NH_4OH$ cleaning process with and without TS-40A pre-treatment was carried out. After the $NH_4OH$ cleaning without TS-40A pretreatment, the sheet resistance Rs of the Cu film and the surface morphology changed slightly(${\Delta}Rs:{\sim}10m{\Omega}/sq.$). On the other hand, after $NH_4OH$ cleaning with TS-40A pretreatment, the Rs of the Cu film changed abruptly (${\Delta}Rs:till{\sim}700m{\Omega}/sq.$); in addition, cracks showed on the surface of the Cu film. According to XPS results, Si ingredient was detected on the surface of all Cu films pretreated with TS-40A. This Si ingredient(a kind of silicate) may result from the TS-40A solution, because sodium metasilicate is included in TS-40A as an alkaline degreasing agent. Finally, we found that the $NH_4OH$ cleaning process without pretreatment using an alkaline cleanser containing a silicate ingredient is more useful at removing Cu oxides on Cu film. In addition, we found that in the $NH_4OH$ cleaning process, an alkaline cleanser like Metex TS-40A, containing sodium metasilicate, can cause cracks on the surface of Cu film.

• Korean Chemical Engineering Research
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• 제47권6호
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• pp.688-694
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• 2009

PCB의 먼지 제거용 세정제로 사용되는 스프레이형 세정제를 선정하여 이에 대한 청정도를 평가하였다. 친환경적인 대체 세정제를 채택하기 위해서는 세정제의 세정성, 환경성, 경제성을 평가하여 체계적인 선정절차에 의거하여 도입 및 적용하여야 한다. 객관적이고 효율적인 세정성 평가방법의 정립이 현시점에서 매우 중요하다. 본 연구에서는 여러 세정성 평가 방법들 중 표면관찰평가법인 SEM-EDX(Scanning Electron Microscopy/Energy-Dispersive X-ray) 분석과 적외선열화상카메라(THERMOVISION A20 model)를 이용하여 청정도를 평가하였다. CT-2770 모델의 사운드카드를 $2{\times}2cm$로 잘라내어 스프레이 세정 전과 후의 청정도를 SEM의 이미지 분석을 통해 관찰할 수 있었고 EDX의 성분분석을 통해 먼지의 제거율을 정량화할 수 있었다. 컴퓨터의 P4T-E 모델의 마더보드와 IPC-A-36 모델의 기판을 사용, 오염물로 먼지와 철가루를 사용하여 열화상카메라로 세정 전, 후의 상온과 $50^{\circ}C$ Oven에 방치된 시간의 차이에 따른 온도의 변화를 비교하였다.

• Korean Chemical Engineering Research
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• 제59권4호
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• pp.632-638
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• 2021

반도체 공정에서 구리 배선 공정의 도입에 따라 플라즈마 식각에 의해 배선의 형성과정에서 구리 산화물, 불화물 및 불화탄소 등을 포함한 복합 잔류물을 형성하게 된다. 본 연구에서는 아민기(-NH₂)와 카르복실기(-COOH)를 갖는 성분으로 세정액을 제조하여 구리 배선 공정에서의 식각 잔류물 제거 특성을 분석하였다. 아민기를 포함한 세정액은 질소에 치환된 성분 및 탄소결합의 길이에 따라 세정효과에 차이를 보이며, 세정액의 pH가 증가함에 따라 구리 산화물의 식각 속도가 증가하는 경향성을 보였다. 아민기의 활성은 염기성 영역에서, 카르복실기의 활성은 산성 영역에서 이루어지며, 각각의 영역에서 구리 또는 구리 산화물과의 complex 형성을 통하여 세정공정이 진행되었다.

• 한국산업보건학회지
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• 제33권4호
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• pp.419-426
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• 2023

Objectives: This study aims to develop an Occupational Safety and Health (OSH) guide for the safe cleaning of contaminated machinery, equipment, and parts used in the electronics manufacturing process. Methods: A literature review, field investigations, and discussions were conducted. An initial draft of an OSH guide was developed and reviewed by experts with significant experience in maintenance work in the electronics manufacturing process in order to refine the guide. Results: Workers involved in cleaning processes with chemicals, solvents, and abrasive blasting can face exposure to a wide range of chemicals, abrasives, and noise. Identifying potential risks associated with each cleaning technique was an essential first step toward enhancing safety measures. The OSH guide comprises approximately eleven to twelve sections spanning 20-25 pages. It includes engineering and administrative protocols systematically organized to address the necessary actions before, during, and after cleaning tasks, depending on the technique. It is recommended that airline respirator masks be used in conjunction with an air purification system to ensure adherence to air quality standard "D" for atmosphere level. The use of an oil-free air compressor is advised, preferably a stationary model that does not rely on fuel sources like diesel. Conclusions: This OSH guide is designed to protect workers involved in maintenance activity in the electronics industry and aligns with global standards, such as those from the International Organization for Standardization (ISO) and Semiconductor Equipment and Material International, ensuring a higher level of safety and compliance.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2000년도 Proceedings of 5th International Joint Symposium on Microeletronics and Packaging
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• pp.57-64
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• 2000

As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology fur their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electrodes nickel, solder jetting, stud bumping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.

• 마이크로전자및패키징학회지
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• 제7권1호
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• pp.51-59
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• 2000

As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology for their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electroless nickel, solder jetting, stud humping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. Research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.

• 반도체디스플레이기술학회지
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• 제7권3호
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• pp.17-21
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• 2008

Application of flash memory in mobile and ubiquitous related devices is rapidly being increased due to its low price and high performance. In addition, some notebook computers currently come out into market with a SSD(Solid State Disk) instead of hard-drive based storage system. Regarding this trend, applications need to increase the storage capacity using multiple flash memory chips for larger capacity sooner or later. Flash memory based storage subsystem should resolve the performance bottleneck for writing in perspective of speed and lifetime according to its physical property. In order to make flash memory storage work with tangible performance, reclaiming of invalid regions needs to be controlled in a particular manner to decrease the number of erasures and to distribute the erasures uniformly over the whole memory space as much as possible. In this paper, we study the performance of flash memory recycling algorithms and demonstrate that the proposed algorithm shows acceptable performance for flash memory storage with multiple chips. The proposed cleaning method partitions the memory space into candidate memory regions, to be reclaimed as free, by utilizing threshold values. The proposed algorithm handles the storage system in multi-layered style. The impact of the proposed policies is evaluated through a number of experiments.