• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.11
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• pp.2149-2154
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• 2009

Electric power quality in power transmission/distribution systems has considerably been deteriorated with the increase in the capacity of distributed generators (DGs). It is because inverters, connecting DGs to conventional power grids, tend to generate harmonic current and voltage. For harmonic mitigation, a large amount of research has been done on passive and active filters, which have been operating successfully in many countries. This paper, therefore, presents how to adopt the filters to an inverter-based DG, with considering a system consisting of both inverter-based DG and harmonic filters. In particular, this paper describes the simulation results using the PSCAD/EMTDC: firstly, the relationship between total harmonic distortion(THD) of current and output power of DG: secondly, the harmonic mitigation ability of passive and active filters. The system, furthermore, is obliged to satisfy the regulations made by Korean Electric Power Corporation(KEPCO). In the regulations, power factor should be maintained between 0.9 and 1 in a grid-connected mode. Thus, this paper suggests two methods for the system to control its power factor. First, the inverter of DG should control power factor rather than an active filter because it brings dramatic decrease in the capacity of the active filter. Second, DG should absorb reactive power only in the range of low output power in order to prevent useless capacity increase of the inverter. This method is expected to result in the variable power factor of the system according to its output power.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2000.11a
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• pp.232-236
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• 2000

To provide model parameters for servo control system design, dynamic characteristics of a piezoelectric microactuator for hard disk drive(HDD) were investigated. At first frequency response characteristics was measured and a second order model was proposed. Here the amplitude dependent dynamic characteristics such as low frequency gain and damping ratio were studied. In addition, the load current and equivalent impedance of the piezoelectric actuator were measured by varying excitation voltage and frequency. At last, the super-harmonic resonance of the piezoelectric actuator was discussed.

• Journal of Power Electronics
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• v.19 no.5
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• pp.1315-1325
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• 2019

Aiming at the negative sequence and harmonic problems in the operation of railway static power conditioners, an optimization compensation strategy for negative sequence and harmonics is studied in this paper. First, the hybrid RPC topology and compensation principle are analyzed to obtain different compensation zone states and current capacities. Second, in order to optimize the RPC capacity configuration, the minimum RPC compensation capacity is calculated according to constraint conditions, and the optimal compensation coefficient and compensation angle are obtained. In addition, the voltage unbalance ${\varepsilon}_U$ and power factor requirements are satisfied. A PSO (Particle Swarm Optimization) algorithm is used to calculate the three indexes for minimum compensating energy. The proposed method can precisely calculate the optimal compensation capacity in real time. Finally, MATLAB simulations and an experimental platform verify the effectiveness and economics of the proposed algorithm.

• Proceedings of the KIPE Conference
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• 1998.11a
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• pp.33-37
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• 1998

For the high power variable speed applications, the DCTLI(diode clamped three-level inverter) have been widely used. This paper describes the analysis of the neutral point current of the DCTLI and the improved space vector-based PWM strategy considering the switching frequency of power devices, that minimizes the fluctuation of the neutral point current in spite of high modulation index region and low power factor. It contributes to decrease the capacitance of dc-link capacitor bank and to increase the neutral point voltage controllable region. Especially, even if second (or even) order harmonic is induced in load current (at this situation, is was investigated that the general control method can not suppress the neutral point voltage variation), this PWM can provide effective control method to suppress the neutral point voltage variation. Various simulation results by means of Matlab/Simulation are presented to verify the proposed PWM.

• Journal of Power Electronics
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• v.16 no.2
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• pp.704-716
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• 2016

Small distributed generation units are usually connected to the main electric grid through single-phase voltage source inverters. Grid operating conditions such as voltage and frequency are not constant and can fluctuate within the range values established by international standards. Furthermore, the requirements in terms of power factor correction, total harmonic distortion, and reliability are getting tighter day by day. As a result, the implementation of reliable and efficient control algorithms, which are able to adjust their control parameters in response to changeable grid operating conditions, is essential. This paper investigates the configuration topology and control algorithm of a single-phase inverter with the purpose of achieving high performance in terms of efficiency as well as total harmonic distortion of the output current. Accordingly, a Second Order Generalized Integrator with a suitable Phase Locked Loop (SOGI-PLL) is the basis of the proposed current and voltage regulation. Some practical issues related to the control algorithm are addressed, and a solution for the control architecture is proposed, based on resonant controllers that are continuously tuned on the basis of the actual grid frequency. Further, intentional islanding operation is investigated and a possible procedure for switching from grid-tied to islanding operation and vice-versa is proposed.

• Journal of Power Electronics
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• v.12 no.3
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• pp.377-386
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• 2012

An interleaved bridgeless buck-boost AC/DC converter is presented in this paper to achieve the characteristics of low conduction loss, a high power factor and low harmonic and ripple currents. There are only two power semiconductors in the line current path instead of the three power semiconductors in a conventional boost AC/DC converter. A buck-boost converter operated in the boundary conduction mode (BCM) is adopted to control the active switches to achieve the following characteristics: no diode reverse recovery problem, zero current switching (ZCS) turn-off of the rectifier diodes, ZCS turn-on of the power switches, and a low DC bus voltage to reduce the voltage stress of the MOSFETs in the second DC/DC converter. Interleaved pulse-width modulation (PWM) is used to control the switches such that the input and output ripple currents are reduced such that the output capacitance can be reduced. The voltage doubler topology is adopted to double the output voltage in order to extend the useable energy of the capacitor when the line voltage is off. The circuit configuration, principle operation, system analysis, and a design example are discussed and presented in detail. Finally, experiments on a 500W prototype are provided to demonstrate the performance of the proposed converter.

• Journal of IKEEE
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• v.26 no.1
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• pp.95-103
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• 2022

In this paper, the efficiency of a sensorless method with square-wave injection for a low-cost inverter, so called B4 inverter is presented. This inverter comprises only 4 switches to reduce system cost. It is distinguished from the conventional B6 inverter that has 6 of switching elements. The B4 inverter, injected a 1 kHz of harmonic wave, has been modelled using the functions and library in Matlab/Simulink. This paper described each component of sensorless algorithm. Among them, the Notch Filter is used to extract the harmonic component of the phase current and a second-order low-pass filter was used to reduce the ripple of the estimated speed. It is shown through simulation that the rotor angle of a permanent magnet synchronous motor is detected by multiplying the current waveform extracted using the notch filter by the harmonic voltage. The feasibility of the proposed method is shown through Simulink simulation.

• Journal of Power Electronics
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• v.10 no.6
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• pp.749-761
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• 2010

The switching frequency of a power device is a very important parameter in the design of a parallel active power filter (PAPF), but so far, very little discussion has been conducted on it in a quantitative manner in previous publications. In this paper, an extensive analysis on the effects of the switching frequency on the performance of a PAPF is made, and a specification of the switching frequency values with different compensation results is presented. A first-order inertia element and a second-order oscillation element are considered as approximate models of a PAPF, respectively. The compensation characteristic for each order of harmonic current is obtained at different switching frequencies. Then, the THDs of each model for the system loads of a rectifier with resistance and inductance loads are proposed. The compensation results of a PAPF controlled as a first-order inertia element are better than those of a PAPF controlled as a second-order oscillation element. With two types of system loads which are rectifier with resistance and inductance loads and rectifier with resistance, inductance and capacitance loads, the THDs of the source current after compensation are presented with different switching frequencies. The compensation characteristics for the most widely used digital control system are investigated. The situation with an analog control is the theoretical characteristic and it is the best situation. The compensation characteristic of the digital control is worse than the compensation characteristic of the theoretical characteristic. Based on these analyses, the specifications of compensation characteristics with different switching frequencies are quite straightforward. Finally, a practical design example is studied to verify the application.

• Journal of Power Electronics
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• v.17 no.5
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• pp.1231-1243
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• 2017

Grid-interactive power converters are normally synchronized with the grid using phase-locked loops (PLLs). The performance of the PLLs is affected by the non-ideal conditions in the sensed grid voltage such as harmonics, frequency deviations and the dc offsets in single-phase systems. In this paper, a single-phase PLL is presented to mitigate the effects of these non-idealities. This PLL is based on the popular second order generalized integrator (SOGI) structure. The SOGI structure is modified to eliminate the effects of input dc offsets. The resulting SOGI structure has a high-pass filtering property. Hence, this PLL is termed as a high-pass generalized integrator based PLL (HGI-PLL). It has fixed parameters which reduces the implementation complexity and aids in the implementation in low-end digital controllers. The HGI-PLL is shown to have the lowest resource utilization among the SOGI based PLLs with dc cancelling capability. Systematic design methods are evolved leading to a design that limits the unit vector THD to within 1% for given non-ideal input conditions in terms of frequency deviation and harmonic distortion. The proposed designs achieve the fastest transient response. The performance of this PLL has been verified experimentally. The results agree with the theoretical prediction.

• Journal of Power Electronics
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• v.17 no.4
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• pp.942-952
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• 2017

Modular multilevel converters (MMCs) have been receiving extensive research interest in high/medium-voltage applications due to its modularity, scalability, reliability, high-voltage capability, and excellent harmonic performance. Submodule capacitors are usually rather bulky because they have to withstand fundamental frequency voltage fluctuations. To reduce the capacitance of these capacitors, this study proposes a modified MMC with an active power decoupling circuit within each submodule. The modified submodule contains an auxiliary half bridge, with its capacitor split in two. Also, the midpoints of the half bridge and the split capacitors are connected by an inductor. With this modified submodule, the fundamental frequency voltage fluctuation can be suppressed to a great extent. The second-order voltage fluctuation, which is the second most significant component in submodule voltage fluctuations, is removed by the proper control of the second-order circulating current. Consequently, the submodule capacitance is significantly reduced. The viability and effectiveness of the proposed new MMC are confirmed by the simulation and experimental results. The proposed MMC is best suited for medium-voltage applications where power density is given a high priority.