• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2006년도 하계종합학술대회
• /
• pp.525-526
• /
• 2006

A macro model for Savtchenko switching mode MRAM (toggling MRAM) cells which can be utilized to develop the core architecture and the peripheral circuitry is proposed, and a writing scheme suitable to the toggling characteristic is developed. The sensing and writing operations of the toggling MRAM adopting the macro model are verified by Spectre simulations.

• 설비공학논문집
• /
• 제25권8호
• /
• pp.432-437
• /
• 2013

The increase of greenhouse gas emission and decrease of fossil fuel are being caused by the indiscreet consumption of energy by people. Recently, green policy has been globally implemented to reduce energy consumption. This paper studied the research to reduce the energy consumption in buildings, by using the heat storage properties of PCM. PCM has to prevent leakage from the liquid state. Therefore, we prepared form stable PCM, by using the vacuum impregnation method. Three kinds of organic PCMs were impregnated into the structure of porous material. The characteristics of the composites were determined by using SEM, DSC, FTIR and TGA. SEM morphology showed the micro structure of silica fume/PCM. Also, thermal properties were examined by DSC and TGA analyses; and the chemical bonding of the composite was determined by FTIR analysis.

• 한국안전학회지
• /
• 제25권3호
• /
• pp.100-106
• /
• 2010

Most of the school buildings were built before the seismic code was established. To consider the sunlight and ventilation to the partition walls are built about 1m height beside columns at typical school buildings. For the reason, columns which is consisted school building occur brittle failure shape by the reduced effective depth. In this study, experimental test for retrofitting effect by Aramid Fiber Reinforced Polymers(AFRP) strips on masonry infilled reinforced concrete(RC) frames is performed. The test results were to ensured enough time to evacuate due to the enhancement of ductility and strength of school buildings to withstand earthquakes using AFRP strips.

• 대한전자공학회논문지SD
• /
• 제42권4호
• /
• pp.9-18
• /
• 2005

본 논문은 OCP(Open Core Protocol)에 호환되는 파이프라인 구조를 가진 시스템 버스와 MPEG 시스템에 적합한 메모리 버스로 구성된 계층 구조를 가지는 새로운 동기 세그먼트 버스를 제안한다. 이 구조는 MPEG 시스템의 모바일 제품에 사용되는 영상 데이터 처리를 위한 메모리 인터페이스에 기반을 둔 버스 구조와 멀티 마스터와 멀티 슬레이브를 사용하여 고성능의 다중 처리를 위한 양방향 다중 버스 구조(hi-direction multiple bus architecture)를 가진다. 효율적인 데이터 처리를 위하여 파이프라인 스테이지와 결합된 마스터와 슬레이브의 주소번지가 latency를 결정하며, 시스템의 특성에 따라서 각각의 IP 코어를 배치하였다. 제안된 버스는 저전력 구현을 위하여 세그먼트 버스 구조를 가지고, 멀티미디어 SoC 시스템의 성능 저하 없이 다중 작업이 가능한 구조를 가지며 확장이 가능하다. 제안된 버스 구조는 AMBA와 비교하였을 때 bandwidth는 3.7배 증가하였고 latency는 0.25배 감소하였다.

• 한국공간구조학회지
• /
• 제16권4호
• /
• pp.18-21
• /
• 2016

• 한국디자인학회:학술대회논문집
• /
• 한국디자인학회 2004년도 추계 학술발표대회 논문집
• /
• pp.200-201
• /
• 2004

• 대한설비공학회:학술대회논문집
• /
• 대한설비공학회 2006년도 동계학술발표대회 논문집
• /
• pp.98-98
• /
• 2006

• 한국환경생태학회:학술대회논문집
• /
• 한국환경생태학회 2001년도 정기총회 및 학술논문발표회
• /
• pp.116-120
• /
• 2001

• ETRI Journal
• /
• 제37권4호
• /
• pp.772-779
• /
• 2015

This paper presents a power-efficient hardware realization for a motion estimation technique that is based on the full-search block matching algorithm (FSBMA). The considered input is the quarter common intermediate format of digital video. The mean of absolute difference (MAD) is the distortion criteria employed for the block matching process. The conventional architecture considered for the hardware realization of FSBMA is that of the shift register-based 2-D systolic array. For this architecture, a conservative approximation technique is adapted to eliminate unnecessary MAD computations involved in the block matching process. Upon introducing the technique to the conventional architecture, the power and complexity of its implantation is reduced, while the accuracy of the motion vector extracted from the block matching process is preserved. The proposed architecture is verified for its functional specifications. A performance evaluation of the proposed architecture is carried out using parameters such as power, area, operating frequency, and efficiency.

• 정보화연구
• /
• 제10권1호
• /
• pp.1-11
• /
• 2013

Various computing systems are used in naval ships. Since each system has a single purpose and its applications are tightly coupled with the physical machine, applications cannot share physical resources with each other. It is hard to utilize resources efficiently in conventional naval shipboard computing environment. In this paper, we present an integration architecture for virtualized naval shipboard computing systems based on open architecture. Our proposed architecture integrates individual computing resources into one single integrated hardware pool so that the OS and applications are encapsulated as a VM. We consider the issue of varying needs of all applications in a naval ship that have different purposes, priorities and requirements. We also present parallel VM migration algorithm that improves the process time of resource reallocation of given architecture. The evaluation results with the prototype system show that our algorithm performs better than conventional resource reallocation algorithm in process time.