• Journal of information and communication convergence engineering
• /
• 제10권2호
• /
• pp.194-199
• /
• 2012

This paper proposes a novel scheme of a gray scale fingerprint image for a high-accuracy capacitive sensor chip. The conventional grayscale image scheme uses a digital-to-analog converter (DAC) of a large-scale layout or charge-pump circuit with high power consumption and complexity by a global clock signal. A modified capacitive detection circuit for the charge sharing scheme is proposed, which uses a down literal circuit (DLC) with a floating-gate metal-oxide semiconductor transistor (FGMOS) based on a neuron model. The detection circuit is designed and simulated in a 3.3 V, 0.35 ${\mu}m$ standard CMOS process. Because the proposed circuit does not need a comparator and peripheral circuits, the pixel layout size can be reduced and the image resolution can be improved.

• The Journal of the Acoustical Society of Korea
• /
• 제27권3E호
• /
• pp.77-83
• /
• 2008

In the process of the sonar image textures produced, the orientation and scale factors are very significant. However, most of the related methods ignore the directional information and scale invariance or just pay attention to one of them. To overcome this problem, we apply Gabor wavelet to extract the features of sonar images, which combine the advantages of both the Gabor filter and traditional wavelet function. The mother wavelet is designed with constrained parameters and the optimal parameters will be selected at each orientation, with the help of bandwidth parameters based on the Fisher criterion. The Gabor wavelet can have the properties of both multi-scale and multi-orientation. Based on our experiment, this method is more appropriate than traditional wavelet or single Gabor filter as it provides the better discrimination of the textures and improves the recognition rate effectively. Meanwhile, comparing with other fusion methods, it can reduce the complexity and improve the calculation efficiency.

• 물과 미래
• /
• 제29권2호
• /
• pp.191-198
• /
• 1996

본 논문에서는 icing의 모양을 대표적으로 나타낼 수 있는 적절한 특성길이의 선정에 대해 서술하였다. 실험 자료를 분석한 결과, 어떤 하나의 길이 단위로 특성길이를 정의하기는 곤란하였다. 특히, glaze icing 의 경우에는 그 형상이 매우 복잡하여 특성길이를 결정하기가 매우 어려웠다. 그러나, 바람의 방향에 수직한 단면의 길이로 정의되는 icing 길이가 icing으로 인한는 하중을 나타내기에는 실린더 혹은 전선의 지름 보다는 더 적절한 특성길이라 판단된다.

• Genomics & Informatics
• /
• 제16권4호
• /
• pp.39.1-39.3
• /
• 2018

The rapid increase in genetic dataset volume has demanded extensive adoption of biological knowledge to reduce the computational complexity, and the biological pathway is one well-known source of such knowledge. In this regard, we have introduced a novel statistical method that enables the pathway-based association study of large-scale genetic dataset-namely, PHARAOH. However, researcher-level application of the PHARAOH method has been limited by a lack of generally used file formats and the absence of various quality control options that are essential to practical analysis. In order to overcome these limitations, we introduce our integration of the PHARAOH method into our recently developed all-in-one workbench. The proposed new PHARAOH program not only supports various de facto standard genetic data formats but also provides many quality control measures and filters based on those measures. We expect that our updated PHARAOH provides advanced accessibility of the pathway-level analysis of large-scale genetic datasets to researchers.

• Coupled systems mechanics
• /
• 제11권1호
• /
• pp.55-78
• /
• 2022

The main aim of this paper is the identification of the model parameters for the constitutive model of concrete and concrete-like materials capable of representing full set of 3D failure mechanisms under various stress states. Identification procedure is performed taking into account multi-scale character of concrete as a structural material. In that sense, macro-scale model is used as a model on which the identification procedure is based, while multi-scale model which assume strong coupling between coarse and fine scale is used for numerical simulation of experimental results. Since concrete possess a few clearly distinguished phases in process of deformation until failure, macro-scale model contains practically all important ingredients to include both bulk dissipation and surface dissipation. On the other side, multi-scale model consisted of an assembly micro-scale elements perfectly fitted into macro-scale elements domain describes localized failure through the implementation of embedded strong discontinuity. This corresponds to surface dissipation in macro-scale model which is described by practically the same approach. Identification procedure is divided into three completely separate stages to utilize the fact that all material parameters of macro-scale model have clear physical interpretation. In this way, computational cost is significantly reduced as solving three simpler identification steps in a batch form is much more efficient than the dealing with the full-scale problem. Since complexity of identification procedure primarily depends on the choice of either experimental or numerical setup, several numerical examples capable of representing both homogeneous and heterogeneous stress state are performed to illustrate performance of the proposed methodology.

• 한국HCI학회:학술대회논문집
• /
• 한국HCI학회 2006년도 학술대회 1부
• /
• pp.931-936
• /
• 2006

This paper presents different issues of the real-time compression algorithms without compromising the video quality in the distributed environment. The theme of this research is to manage the critical processing stages (speed, information lost, redundancy, distortion) having better encoded ratio, without the fluctuation of quantization scale by using IP configuration. In this paper, different techniques such as distortion measure with searching method cover the block phenomenon with motion estimation process while passing technique and floating measurement is configured by discrete cosine transform (DCT) to reduce computational complexity which is implemented in this video codec. While delay of bits in encoded buffer side especially in real-time state is being controlled to produce the video with high quality and maintenance a low buffering delay. Our results show the performance accuracy gain with better achievement in all the above processes in an encouraging mode.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2007년도 심포지엄 논문집 정보 및 제어부문
• /
• pp.304-306
• /
• 2007

Methods of Object recognition from camera image are to compare features of color. edge or pattern with model in a general way. SIFT(scale-invariant feature transform) has good performance but that has high complexity of computation. Using simple color histogram has low complexity. but low performance. In this paper we represent a model as a color cooccurrence histogram. and we improve performance using pyramid matching. The color cooccurrence histogram keeps track of the number of pairs of certain colored pixels that occur at certain separation distances in image space. The color cooccurrence histogram adds geometric information to the normal color histogram. We suggest object recognition by pyramid matching of color cooccurrence histogram.

• 한국정보전자통신기술학회논문지
• /
• 제2권3호
• /
• pp.39-52
• /
• 2009

Scale Invariant Feature Transform (SIFT) is an effective algorithm in object recognition, panorama stitching, and image matching, however, due to its complexity, real time processing is difficult to achieve with software approaches. This paper proposes using a reconfigurable hardware processor with integer half kernel. The integer half kernel Gaussian reduces the Gaussian pyramid complexity in about half [] and the reconfigurable processor carries out a parallel implementation of a full search Fast SIFT algorithm. We use a low memory, fine grain single instruction stream multiple data stream (SIMD) pixel processor that is currently being developed. This implementation fully exposes the available parallelism of the SIFT algorithm process and exploits the processing and I/O capabilities of the processor which results in a system that can perform real time image and video compression. We apply this novel implementation to images and measure the effectiveness. Experimental simulation results indicate that the proposed implementation is capable of real time applications.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• 제16권9호
• /
• pp.2942-2960
• /
• 2022

The core of cognitive radio is the problem concerning intelligent decision-making for communication parameters, the objective of which is to find the most appropriate parameter configuration to optimize transmission performance. The current algorithms have the disadvantages of high dependence on prior knowledge, large amount of calculation, and high complexity. We propose a new decision-making model by making full use of the interactivity of reinforcement learning (RL) and applying the Q-learning algorithm. By simplifying the decision-making process, we avoid large-scale RL, reduce complexity and improve timeliness. The proposed model is able to find the optimal waveform parameter configuration for the communication system in complex channels without prior knowledge. Moreover, this model is more flexible than previous decision-making models. The simulation results demonstrate the effectiveness of our model. The model not only exhibits better decision-making performance in the AWGN channels than the traditional method, but also make reasonable decisions in the fading channels.

• Journal of Semiconductor Engineering
• /
• 제1권1호
• /
• pp.57-63
• /
• 2020

Complementary metal-oxide-semiconductor (CMOS) technology is now facing a power scaling limit to increase integration density. Since 1970s, multi-valued logic (MVL) has been considered as promising alternative to resolve power scaling challenge for increasing information density up to peta-scale level by reducing the system complexity. Over the past several decades, however, a power-scalable and mass-producible MVL technology has been absent so that MVL circuit and system implementation have been delayed. Recently, compact MVL device researches incorporating multiple-switching characteristics in a single device such as 2D heterojunction-based negative-differential resistance (NDR)/transconductance (NDT) devices and quantum-dot/superlattices-based constant intermediate current have been actively performed. Meanwhile, wafer-scale, energy-efficient and variation-tolerant ternary-CMOS (T-CMOS) technology has been demonstrated through commercial foundry. In this review paper, an overview for MVL development history including recent studies will be presented. Then, the status and its future research direction of MVL technology will be discussed focusing on the T-CMOS technology for peta-scale information processing in semiconductor chip.