• Title/Summary/Keyword: Sang-So

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Low Power SoC Design Trends Using EDA Tools (설계툴을 사용한 저전력 SoC 설계 동향)

  • Park, Nam Jin;Joo, Yu Sang;Na, Jung-Chan
    • Electronics and Telecommunications Trends
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    • v.35 no.2
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    • pp.69-78
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    • 2020
  • Small portable devices such as mobile phones and laptops currently display a trend of high power consumption owing to their characteristics of high speed and multifunctionality. Low-power SoC design is one of the important factors that must be considered to increase portable time at limited battery capacities. Popular low power SoC design techniques include clock gating, multi-threshold voltage, power gating, and multi-voltage design. With a decreasing semiconductor process technology size, leakage power can surpass dynamic power in total power consumption; therefore, appropriate low-power SoC design techniques must be combined to reduce power consumption to meet the power specifications. This study examines several low-power SoC design trends that reduce semiconductor SoC dynamic and static power using EDA tools. Low-power SoC design technology can be a competitive advantage, especially in the IoT and AI edge environments, where power usage is typically limited.

Prediction of Dynamic Power Consumption and IR Drop Analysis by efficient current modeling (효율적 전류모델을 이용한 고속의 전압 강하와 동적 파워 소모의 분석 기술)

  • Han, Sang-Yeol;Park, Sang-Jo;Lee, Yun-Sik
    • Journal of IKEEE
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    • v.8 no.1 s.14
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    • pp.63-72
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    • 2004
  • The supply voltage has been drop rapidly and the total length of the wire increased exponentially in the nanometer SoC design environment. The ideal supply voltage was dropped sharply by the resistance and parasitic devices which stayed on the kilometers-long wire length. Even worse, it could severely affect the functional behavior of the block of the design. To analyze the effects of the long wire of the SoC while maintaining the accuracy, the modeling of the current and the RC conversion of the parasitic techniques are researched and applied. By these modeling and conversion, the multi-million gates HDTV Chipset can be analyzed within a day. The benchmark analysis of the HDTV SoC showed the superiority to the conventional methods in performance and accuracy.

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A clinical report on the three cases of Benign paroxysmal positional vertigo improved with So-Yang-In Hyeong-Bang-Do-Jeok-San (양성 특발성 체위성 현훈 환자에 소양인(陽人) 형방도적산(荊防導赤散)을 투여하여 호전된 3예 보고)

  • Yun, Kyoung-Sun;Jeong, Sung-Hyun;Shin, Gil-Cho;Lee, Won-Chul;Lee, Ji-Hun
    • Journal of Sasang Constitutional Medicine
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    • v.15 no.2
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    • pp.101-110
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    • 2003
  • Benign paroxysmal positional vertigo(BPPV) is the most common peripheral vestivular disorder that is featured with paroxysmal vertigo caused by position changes. For a long time, it has been believed that the rendition is caused by inorganic particles in the cupula of the posterior semicircular canal. In the book 'DongyiSuseBowon(東醫壽世保元)', vertigo has been mentioned So-Yang-Sang-Pung syndrome and fever-aversive syndrome for Yin deficiency of So-Yang-In. Hyeong-Bang-Do-Jeok-San(荊防導赤散) is used at So-Yang-Sang-Pung and Gyeol-Hyung syndrome of So-Yang-In. Three patients in the cases have been suffered from vertigo, nausea and hot flushes etc. These patients were classified as So-Yang-In by features in the face, bodyshape and personality patterns. All of them have been improved in vertigo and other symptoms with Hyeong-Bang-Do-Jeok-San for a few days. The result showed that So-Yang-In Hyeong-Bang-Do-Jeok-San was effective on vertigo and other symptoms of BPPV patients.

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Analysis of Verification Methodologies Based on a SoC Platform Design

  • Lee, Je-Hoon;Kim, Sang-Choon
    • International Journal of Contents
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    • v.7 no.1
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    • pp.23-28
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    • 2011
  • In a SoC (system-on-chip) design, a design complexity is a big bottleneck. In order to overcome the design complexity, platform based design method is widely adopted for designers. Most complex SoCs need a heterogeneous design development environment for hardware and software co-design. In this paper, we discuss about some kinds of verification approaches with platform based design methodology at various abstraction levels of SoC design. We separate the verification process to two steps according to the different levels of verification. We employ a flexible SoC design environment to support simultaneous hardware and software development. We demonstrate the verification strategy of a target SoC design, IEEE 802.11a WLAN SoC.

A Study on a Simulation Model to Analyze the Availability of a SoS (복합시스템 가용도 분석을 위한 시뮬레이션 모델 연구)

  • Kim, Hye-Lyeong;Kim, Ui-Hwan;Choi, Sang-Yeong
    • Journal of the Korea Institute of Military Science and Technology
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    • v.14 no.6
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    • pp.1049-1057
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    • 2011
  • Today, most weapon systems operate as component systems of SoS(System of Systems) and they produce synergy effects in the battle field by interoperating. In addition, the acquisition issues on weapon systems have expanded into SoS context including sustainment analysis. Availability is the sustainment KPP(Key Performance Parameter) of weapon systems. In this paper, a simulation model is proposed to analyze the availability of SoS. The simulation model consists of 5 modules: Mission and Task, System, System RBD, Maintenance system and a simulation engine. Then it was implemented and applied to a SoS. As a result of the application, the simulation model could be applied for analyzing the availability of the SoS and provided information about critical tasks and risky component systems to complete the given mission of the SoS.

Hot Issue - LED EXPO 2009

  • Kim, Sang-Bae
    • IT SoC Magazine
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    • s.31
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    • pp.15-18
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    • 2009
  • LED에 대한 신기술 및 시장 동향을 한 눈에 알아볼 수 있는 '국제 LED 엑스포 2009'가 지난 5월 20일부터 23일까지 나흘간 일산 KINTEX에서 개최됐다. 올해로 7회째를 맞는 이번 전시회는 새롭게 출범한 삼성LED를 비롯해 금호전기, 태원전기산업, 우리조명, 넥손, 다산에이디, 루미마이크로, 와이즈파워, 한솔, 빛샘전자 등 기술 경쟁력을 갖춘 국내외 228개 업체가 474부스 규모로 참가했다.

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