• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.7
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• pp.560-565
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• 2018

The SPICE (Sparse Iterative Covariance-based Estimation) algorithm estimates the azimuth angle by applying a sparse recovery method to the covariance matrix in the time domain. In this paper, we show how the SPICE algorithm, which was originally formulated in the time domain, can be extended to the frequency domain. Furthermore, we demonstrate, through numerical results, that the performance of the proposed algorithm is superior to that of the conventional frequency domain algorithm.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.9
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• pp.1769-1774
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• 2009

An algorithm for extracting the BJT DC model parameter values for SPICE model is proposed. The nonlinear optimization method for analyzing the device I-V data using the Levenberg-Marquardt algorithm is proposed and the method for calculating initial conditions of model parameters to improve the convergence characteristics is proposed. The base current and collector current obtained from the proposed method shows the root mean square error of 6.04% compared with the measured data of the PNP BJT named 2SA1980.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.12
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• pp.2281-2285
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• 2011

An algorithm for extracting SPICE MOS level 2 model parameters for the high voltage MOSFET DC model is proposed. The optimization method for analyzing the nonlinear data of the current-voltage curve using the Gauss-Newton algorithm is proposed and the pre-process step for calculating the threshold voltage and the mobility is proposed. The drain current obtained from the proposed method shows the maximum relative error of 5.6% compared with the drain current of 2-dimensional device simulation for the high voltage MOSFET.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.8
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• pp.12-19
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• 2017

In this paper a super-resolution time delay estimation algorithm that estimates the time delays of spread spectrum signals using sparse signal reconstruction approach is introduced. So far, the correlation method has been mostly used to estimate the time delays of spread spectrum signals. However it fails to accurately estimate the time delays in the case where the signals are spaced within approximately 1 PN chip duration and a further processing should be applied to the correlation outputs in order to enhance the resolution capability. Recently sparse signal approaches attract much interest in the area of directions-of-arrival estimation, of which SPICE is the most representative. Thus we introduce a super-resolution time delay estimation algorithm based on the SPICE approach and compare its performance with that of MUSIC algorithm by applying them to the ISO/IEC 24730-2.1 RTLS system.

• Journal of Power Electronics
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• v.15 no.2
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• pp.479-486
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• 2015

The application of soft-switching techniques is increasing in the DC/DC converter area. It is important to design soft-switching parameters to ensure the converter operates properly and efficiently. An optimized design method is presented in this paper. The objective function is the total power loss of a converter, while the variables are soft-switching parameters and the constraints are the electrical requirements for soft-switching. Firstly, a response surface methodology (RSM) model with a high precision is built, and the rough optimized parameters can be obtained with the help of a genetic algorithm (GA) in the solution space determined by the constraints. Secondly, a re-optimization is conducted with a SPICE model and a GA, and accurate optimized parameters can be obtained. Simulation and experiment results show that the proposed method performs well in terms of a wide adaptability, efficiency, and global optimization.

• IEIE Transactions on Smart Processing and Computing
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• v.5 no.5
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• pp.358-365
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• 2016

We propose a novel application of random forest, a machine learning-based general classification algorithm, to analyze the influence of design attributes on the silicon-to-SPICE (S2S) gap. To improve modeling accuracy, we introduce magnification of learning data as well as randomization for the counting of design attributes to be used for each tree in the forest. From the automatically generated decision trees, we can extract the so-called importance and impact indices, which identify the most significant design attributes determining the S2S gap. We apply the proposed method to actual silicon data, and observe that the identified design attributes show a clear trend in the S2S gap. We finally unveil 10nm key fin-shaped field effect transistor (FinFET) structures that result in a large S2S gap using the measurement data from 10nm test vehicles specialized for model-hardware correlation.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.6
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• pp.131-139
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• 1989

This paper proposes Domino CMOS NOR-NOR Array Logic design method which has the same as characteristic of CMOS and Domino CMOS in Array Logic like PLA, good operation feature, high desity, easy test generation. This testable design method can detect all of faults in the circuit using simple additional circuit and solve the parasitic capacitance problem by improving the pull-down characteristics. A Test generation algorithm and test procedure using concept of PLA product term and personality matrix are proposed, and it was implemented in PASCAL language. This design method is verified by SPICE and P-SPICE simulation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.2 no.1
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• pp.147-156
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• 1998

In this paper, an arithmetic processor using multi-valued logic is designed. For implementing of multi-valued logic circuits, we use current-mode CMOS circuits and design encoder which change binary voltage-mode signals to multi-valued current-mode signals and decoder which change results of arithmetic to binary voltage-mode signals. To reduce the number of partial product we use 4-radix SD number partial product generation algorithm that is an extension of the modified Booth's algorithm. We demonstrate the effectiveness of the proposed arithmetic circuits through SPICE simulation and Hardware emulation using FPGA chip.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.47-50
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• 2000

DC Gummel-Poon SPICE model parameter extraction program has been implemented. This program extracts the parameters from measured data using Levenberg-Marquardt algorithm. Measured data consist of forward and reverse Gummel plot, forward and reverse output characteristics and RE and RC measurements.

• Proceedings of the KIEE Conference
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• 1987.07b
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• pp.1532-1535
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• 1987

In this paper, we propose the algorithm for mask level simulation. The circuit parameters were extracted from the photomask data in format of bitmap. The extracted circuit parameter was transformed into the input file format of SPICE-16. And then the simulation of mask pattern data was carried out the SPICE-16. Thus the error operation of IC due to the mistake of photomask pattern could be prevented.