• Title/Summary/Keyword: SLVS

Search Result 4, Processing Time 0.017 seconds

A 2-Gb/s SLVS Transmitter for MIPI D-PHY (MIPI D-PHY를 위한 2-Gb/s SLVS 송신단)

  • Baek, Seung Wuk;Jeong, Dong Gil;Park, Sang Min;Hwang, Yu Jeong;Jang, Young Chan
    • Journal of Korea Society of Industrial Information Systems
    • /
    • v.18 no.5
    • /
    • pp.25-32
    • /
    • 2013
  • A 1.8V 2-Gb/s scalable low voltage signaling (SLVS) transmitter (TX) is designed for mobile applications requiring high speed and low power consumption. It consists of 4-lane TX for data transmission, 1-lane TX for a source synchronous clocking, and a 8-phase clock generator. The proposed SLVS TX has the scaling voltage swing from 50 mV to 650 mV and supports a high speed (HS) mode and a low power (LP) mode. An output impedance calibration scheme for the SVLS TX is proposed to improve the signal integrity. The proposed SLVS TX is implemented by using a 0.18-${\mu}m$ 1-poly 6-metal CMOS with a 1.8 V supply. The simulated data jitter of the implemented SLVS TX is about 8.04 ps at the data rate of 2-Gb/s. The area and power consumption of the 1-lane of the proposed SLVS TX are $422{\times}474{\mu}m^2$ and 5.35 mW/Gb/s, respectively.

A 1.8V 2-Gb/s SLVS Transmitter with 4-lane (4-lane을 가지는 1.8V 2-Gb/s SLVS 송신단)

  • Baek, Seung-Wuk;Jang, Young-Chan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2013.10a
    • /
    • pp.357-360
    • /
    • 2013
  • A 1.8V 2-Gb/s scalable low voltage signaling (SLVS) transmitter (TX) is designed for mobile applications requiring high speed and low power consumption. It consists of 4-lane TX for data transmission, 1-lane TX for a source synchronous clocking, and a 8-phase clock generator. The proposed SLVS TX has the scaling voltage swing from 50 mV to 650 mV and supports a high speed (HS) mode and a low power (LP) mode. An output impedance calibration scheme for the SVLS TX is proposed to improve the signal integrity. The proposed SLVS TX is implemented by using a $0.18-{\mu}m$ 1-poly 6-metal CMOS with a 1.8V supply. The simulated data jitter of the implemented SLVS TX is about 8.04 ps at the data rate of 2-Gbps. The area and power consumption of the 1-lane of the proposed SLVS TX are $422{\times}474{\mu}m^2$ and 5.35 mW/Gb/s, respectively.

  • PDF

A 1.88-mW/Gb/s 5-Gb/s Transmitter with Digital Impedance Calibration and Equalizer (디지털 임피던스 보정과 이퀄라이저를 가진 1.88mW/Gb/s 5Gb/s 송신단)

  • Kim, Ho-Seong;Beak, Seung-Wuk;Jang, Young-Chan
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.20 no.1
    • /
    • pp.110-116
    • /
    • 2016
  • This paper describes 1.2-V 5-Gb/s scalable low voltage signaling(SLVS) differential transmitter(TX) with a digital impedance calibration and equalizer. The proposed transmitter consists of a phase-locked loop(PLL) with 4-phase output clock, a 4-to-1 serializer, a regulator, an output driver, and an equalizer driver for improvement of the signal integrity. A pseudo random bit sequence generator is implemented for a built-in self-test. The proposed SLVS transmitter provides the output differential swing level from 80mV to 500mV. The proposed SLVS transmitter is implemented by using a 65-nm CMOS with a 1.2-V supply. The measured peak-to-peak time jitter of the implemented SLVS TX is about 46.67 ps at the data rate of 5Gb/s. Its power consumption is 1.88 mW/Gb/s.

Conceptual Design Trade Offs between Solid and Liquid Propulsion for Optimal Stage Configuration of Satellite Launch Vehicle

  • Qasim, Zeeshan;Dong, Yunfeng
    • Proceedings of the Korean Society of Propulsion Engineers Conference
    • /
    • 2008.03a
    • /
    • pp.283-292
    • /
    • 2008
  • The foremost criterion in the design of a Satellite Launch Vehicle(SLV) is its performance capability to boost the designated payload to the desired mission orbit; it starts from focusing on the SLV configuration to achieve the velocity requirements($}\Delta}V$) for the mission. In this paper we review an analytical approach which is suitable enough for preliminary conceptual design and is used previously to optimize stage configurations for Two Stage to Orbit SLV for Low Earth Orbit(LEO) Missions; we have extended this approach to Three Stage to Orbit SLV and compared different propellant options for the mission. The objective is to minimize the Gross Lift off Weight(GLOW). The primary performance figures of merit were the total inert weight of the SLV and the payload weight that the SLV could lift into LEO, given candidate propulsion systems. The optimization is achieved by configuring the $}\Delta}V$ between stages. A comparison of configurations of single-stage and multi-stage SLVs is made for different propellants. Based upon the optimized stage configurations a comparative performance analysis is made between Liquid and Solid fueled SLV. A 3 degree of freedom trajectory-analysis program is modeled in SIMULINK and used to conduct the performance analysis. Furthermore, a cost analysis is performed on our stage optimized SLVs. The cost estimation relationships(CER) used give us a comparison of development and fabrication costs for the Liquid vs. Solid fueled SLV in man years. The pros and cons of the production, operation ability, performance, responsiveness, logistics, price, shelf life, storage etc of both Solid and Liquid fueled SLVs are discussed. The statistics and data are used from existing or historical(real) SLV stages.

  • PDF