• 한국정보과학회:학술대회논문집
• /
• 한국정보과학회 2011년도 한국컴퓨터종합학술대회논문집 Vol.38 No.1(B)
• /
• pp.313-316
• /
• 2011

SRAM-based FPGAs are very sensitive to single event upset(SEU) induced by space irradiation. To mitigate SEU effects, space applications employ some mitigation schemes. The triple modular redundancy(TMR) is a well-known mitigation scheme. It uses one or three voters as well as three identical blocks performing the same work. The voters can mask out one error in the outputs from the three replicated blocks. One SEU error in TMRed circuits can be masked but it needs to be detected for some reasons such as to analyze the SEU effects in the satellite or to recover the circuits from the error before additional error occur. In this paper, we developed a fault detection circuit and reporting system to detect a fault on the TMRed circuits. To verify our error detection circuit and reporting circuit, we performed an irradiation test at MC-50 Cyclotron. Experimental results showed that error detection circuit can detect a fault on the TMRed test circuit in radiation environment.

• 전기학회논문지
• /
• 제57권8호
• /
• pp.1440-1446
• /
• 2008

In this paper, a novel TMR (Triple Modular Redundancy) memory structure is proposed using state feedback control of asynchronous sequential machines. The main ability of the proposed structure is to correct the fault of SEU (Single Event Upset) asynchronously without resorting to the global synchronous clock. A state-feedback controller is combined with the TMR realized as a closed-loop asynchronous machine and corrective behavior is operated whenever an unauthorized state transition is observed so as to recover the failed state of the asynchronous machine to the original one. As a case study, an asynchronous machine modelling of TMR and the detailed procedure of controller construction are presented. A simulation results using VHDL shows the validity of the proposed scheme.

• Nuclear Engineering and Technology
• /
• 제49권8호
• /
• pp.1589-1599
• /
• 2017

Field programmable gate arrays (FPGAs) are getting more attention in safety-related and safety-critical application development of nuclear power plant instrumentation and control systems. The high logic density and advancements in architectural features make static random access memory (SRAM)-based FPGAs suitable for complex design implementations. Devices deployed in the nuclear environment face radiation particle strike that causes transient and permanent failures. The major reasons for failures are total ionization dose effects, displacement damage dose effects, and single event effects. Different from the case of space applications, soft errors are the major concern in terrestrial applications. In this article, a review of radiation effects on FPGAs is presented, especially soft errors in SRAM-based FPGAs. Single event upset (SEU) shows a high probability of error in the dependable application development in FPGAs. This survey covers the main sources of radiation and its effects on FPGAs, with emphasis on SEUs as well as on the measurement of radiation upset sensitivity and irradiation experimental results at various facilities. This article also presents a comparison between the major SEU mitigation techniques in the configuration memory and user logics of SRAM-based FPGAs.

• 전자공학회논문지SC
• /
• 제45권4호
• /
• pp.35-41
• /
• 2008

메모리 소자가 우주 환경에 노출되면 우주 방사능에 의해 메모리의 값이 변하는 SEU 현상이 발생한다. 이러한 현상에 대처하기 위하여 위성체에 사용되는 메모리는 필연적으로 오류 탐지 및 극복 기법을 탑재하고 있다. 본 논문에서는 과학기술위성 3호 대용량 메모리 유닛에서 채택하게 될 오류 탐지 및 극복 방식을 알아본다. 오류 극복을 위해 대용량 메모리를 RS(10,8) Reed-solomon 코드로 인코딩/디코딩했을 때 SEU에 의해 메모리의 데이터가 손상 받을 확률을 계산한다. 이 확률식을 기반으로 과학기술위성 3호가 직면할 수 있는 다양한 SEU 발생율에 대하여 그 확률 변화를 분석한다. 이것으로부터 과학기술위성 3호 대용량 메모리 유닛 설계의 중요한 요소 중의 하나인 메모리 인코딩/디코딩 주기를 결정하는데 이용하고자 한다.

• 한국인터넷방송통신학회논문지
• /
• 제24권1호
• /
• pp.97-101
• /
• 2024

본 논문에서는 Xilinx 사의 RFSoC FPGA에 대해 양성자 빔 조사 시험 로직 구현과 시험 결과를 제시한다. RFSoC는 FPGA 기능 외에도 CPU, ADC, DAC가 집적화되어 있는 칩으로 소형경량화를 목적으로 둔 방위산업 및 우주 산업에서 주목받고 있는 칩이다. 이러한 칩을 우주 환경에서 사용하려면 방사선 영향에 대한 분석이 필요하며 방사선 경감 대책이 필요하게 되었다. 양성자 조사 시험을 통해 RFSoC의 방사선 영향을 측정할 수 있는 로직을 설계하였다. Memory에 저장된 값을 정상 값과 비교하는 로직을 구현하고 RFSoC에 양성자를 조사하여 Block memory 영역에서 발생하는 SEU를 측정하였다. 다른 영역에서의 SEU 발생을 완화하기 위해 TMR, SEM을 적용하여 설계하였다. 시험 결과를 통해 본 시험 구성에 대해 검증하고 향후 위성용 로직 설계를 검증할 수 있는 환경을 구축하고자 한다.

• International Journal of Aeronautical and Space Sciences
• /
• 제3권2호
• /
• pp.31-39
• /
• 2002

In this paper, KOMPSAT-2 on-board fault and ground recovery management design is addressesed in terms of hardware and software components which provide failure detection and spacecraft safing for anomalies which threaten spacecraft survival. It also includes ground real time up-commanding operation to recover the system safely. KOMPSAT-2 spacecraft fault and recovery management is designed such that the subsequent system configuration due to system initialization is initiated and controlled by processors. This paper will show that KOMPSAT-2 has a new design feature of CPU SEU mitigation for the possible upsets in the processor CPUs as a part of on-board fault management design. Recovery management of processor switching has two different ways: gang switching and individual switching. This paper will show that the difficulties of using multiple-processor system can be managed by proper design implementation and flight operation.