• Clean Technology
• /
• v.11 no.3
• /
• pp.117-122
• /
• 2005

N-vinyl caprolactam (NVCL), a kind of N-vinyl amide monomer, must be dissolved in continuous phase ($scCO_2$) for dispersion polymerization in supercritical carbon dioxide. Phase behavior of $CO_2$+NVCL is very important and necessary for determining initial polymerization condition and for monomer extraction from final polymer. There is the limitation of experimental method for obtaining pure properties of the monomer because of the possibility of polymerization. And N-methyl caprolactam (NMCL) is the useful solvent for the gas treating process. In the viewpoint of molecular thermodynamics, NVCL and NMCL have same functional group i.e. ${\varepsilon}$-caprolactam. In the case of NVCL, hydrogen of amide group is substituted with vinyl group and for NMCL, hydrogen of amide group is substituted with methyl group. We suggested modified group contribution method for this ${\varepsilon}$-caprolactam derivatives. This new group contribution parameter was applied to correlate $CO_2$ + N-vinyl caprolactam or N-methyl caprolactam system.

• Korean Journal of Food Science and Technology
• /
• v.45 no.6
• /
• pp.777-784
• /
• 2013

The ethyl acetate (EtOAc) layer of Canavalia gladiata (sword bean) methanol extracts showed higher 1,1-diphenyl-2-picrylhydrazyl (DPPH) radical-scavenging activity than other layers. Four phenolic compounds were isolated from the EtOAc layer by silica gel column chromatography and prep-HPLC using a guided DPPH radical-scavenging assay. The isolated compounds were identified as methyl gallate (1), gallic acid (2), 1,6-di-O-galloyl ${\beta}$-$\small{D}$-glucopyranoside (3), and 1,4,6-tri-O-galloyl ${\beta}$-$\small{D}$-glucopyranoside (4) based on MS and NMR analyses. Among the four compounds, no. 4 was isolated from this plant for the first time. Their DPPH radical-scavenging activities based on $SC_{50}$ decreased in the following order: 4 (6.9 ${\mu}M$)>3 (8.3 ${\mu}M$)>2 (10.0 ${\mu}M$)>1 (10.3 ${\mu}M$).

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.38 no.1
• /
• pp.27-34
• /
• 2001

The multiplication algorithm using the primitive irreducible trinomial $x^m+x+1$ over $GF(2^m)$ was proposed by Mastrovito. The multiplier proposed in this paper consisted of the multiplicative operation unit, the primitive irreducible operation unit and mod operation unit. Among three units mentioned above, the Primitive irreducible operation was modified to primitive irreducible trinomial $x^m+x+1$ that satisfies the range of 1$x^m,{\cdots},x^{2m-2}\;to\;x^{m-1},{\cdots},x^0$ is reduced. In this paper, the primitive irreducible polynomial was reduced to the primitive irreducible trinomial proposed. As a result of this reduction, the primitive irreducible trinomial reduced the size of circuit. In addition, the proposed design of multiplier was suitable for VLSI implementation because the circuit became regular and modular in structure, and required simple control signal.

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.44 no.1
• /
• pp.85-93
• /
• 2007

This paper presents new LVDS I/O circuits with a high noise margin for use in highly parallel I/O environments. The proposed LVDS I/O includes transmitter and receiver parts. The transmitter circuits consist of a differential phase splitter and a output stage with common mode feedback(CMFB). The differential phase splitter generates a pair of differential signals which have a balanced duty cycle and $180^{\circ}$ phase difference over a wide supply voltage variation due to SSO(simultaneous switching output) noises. The CMFB output stage produces the required constant output current and maintains the required VCM(common mode voltage) within ${\pm}$0.1V tolerance without external circuits in a SSO environment. The proposed receiver circuits in this paper utilizes a three-stage structure(single-ended differential amp., common source amp., output stage) to accurately receive high-speed signals. The receiver part employs a very wide common mode input range differential amplifier(VCDA). As a result, the receiver improves the immunities for the common mode noise and for the supply voltage difference, represented by Vgdp, between the transmitter and receiver sides. Also, the receiver produces a rail-to-rail, full swing output voltage with a balanced duty cycle(50% ${\pm}$ 3%) without external circuits in a SSO environment, which enables correct data recovery. The proposed LVDS I/O circuits have been designed and simulated with 0.18um TSMC library using H-SPICE.

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.44 no.1
• /
• pp.33-39
• /
• 2007

LonWorks over IP (LonWorks/IP) virtual device network (VDN) is an integrated form of LonWorks device network and IP data network. LonWorks/IP VDN can offer ubiquitous access to the information on the factory floor and make it possible for the predictive and preventive maintenance on the factory floor. Timely response is inevitable for predictive and preventive maintenance on the factory floor under the real-time distributed control. The network induced uncertain time delay deteriorates the performance and stability of the real-time distributed control system on LonWorks/IP virtual device network. Therefore, in order to guarantee the stability and to improve the performance of the networked distributed control system the time-varying uncertain time delay needs to be compensated for. In this paper, under the real-time distributed control on LonWorks/IP VDN with uncertain time delay, a control scheme based on disturbance observer and ZPETC(Zero Phase Error Tracking Controller) phase lag compensator is proposed and tested through computer simulation. The result of the proposed control is compared with that of internal model controller (IMC) based on Smith predictor and disturbance observer. It is shown that the proposed control scheme is disturbance and noise tolerant and can significantly improve the stability and the tracking performance of the periodic reference. Therefore, the proposed control scheme is well suited for the distributed servo control for predictive maintenance on LonWorks/IP-based virtual device network with time-varying delay.

• The Korean Journal of Mycology
• /
• v.28 no.1
• /
• pp.22-25
• /
• 2000

This study was carried out to compare DNA sequence of mating type locus concerning with direct formation of fruiting body in Schizophyllum commune which is growing in North America with that of same species growing in South America. The nucleotide sequence appeared to have about 96% homology to 1-71 $A{\alpha}3$ allele from South America strain, showing a conservative feature. The polypeptide sequence showed about 82% homology when compared partially with mating activity region of 1-71 $A{\alpha}3$ allele. In addition, this polypeptide sequence indicated 74% and 82% identity in homeodomain and acidic-rich regions known as a transcription factor respectively.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.18 no.12
• /
• pp.150-156
• /
• 2017

This study examined the stress recovery length due to the local damage of a 7-wire strand, which is applied widely to PSC (Post Tensioned Concrete) bridges and cable-stayed bridges. The 7-wire strand is a multiple stranded steel of PC prestressing strand. Owing to the nature of the material, it is damaged continuously after completion with corrosion being the main cause of damage. On the other hand, due to its structural characteristics, it is difficult to grasp the degree of damage inside the cable and the pattern of stress variation. In the case of cables applied to bridges, the parts that are susceptible to corrosion are generated depending on the water supply and installation shape, which may cause local damage. This study analyzed the tendency of performance degradation and stress recovery length according to local damage of a 7-wire strand, which is applied mainly to bridge post-tensioning or stay cables. This study developed a computer-based simulation model that was validated with experimental results. The model developed in this study can be used to evaluate the safety level and estimate the remaining life span of P SC bridges or cable-stayed bridges.

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.42 no.2 s.302
• /
• pp.11-18
• /
• 2005

To detect vehicles in image, first the image is transformed with the steerable pyramid which has independent directions and levels. Feature vectors are the collection of filter responses at different scales of a steerable image pyramid. For the detection of vehicles in image, feature vectors in feature points of the vehicle image is used. First the feature points are selected with the grid points in vehicle image that are evenly spaced, and second, the feature points are comer points which m selected by human, and last the feature points are corner Points which are selected in grid points. Next the feature vectors of the model vehicle image we compared the patch of the test images, and if the distance of the model and the patch of the test images is lower than the predefined threshold, the input patch is decided to a vehicle. In experiment, the total 11,191 vehicle images are captured at day(10,576) and night(624) in the two local roads. And the $92.0\%$ at day and $87.3\%$ at night detection rate is achieved.

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.42 no.6
• /
• pp.23-36
• /
• 2005

PLLs have been widely used for many applications including communication systems. This paper presents a VCO with an improved negative skewed delay scheme and a PLL using this VCO. The proposed VCO and PLL are intended for replacing traditional LC oscillators and PLLs used in communication systems and other applications. The circuit designs of the VCO and PLL are based on 0.18um CMOS technology with 1.8V supply voltage. The proposed VCO employs subfeedback loops using pass-transistors and needs two opposite control voltages for the pass transistors. The subfeedback loops speed up oscillation depending on the control voltages and thus provide a high oscillation frequency. The two voltage controls have opposite frequency gain characteristics and result in low phase-noise. The 7-stage VCO in 0.18um CMOS technology operates from $3.2GHz\~6.3GHz$ with phase noise of about -128.8 dBc/Hz at 1MHz frequency onset. For 1.8V supply voltage, the current consumption is about 3.8mA. The proposed PLL has dual loop-filters for the proposed VCO. The PLL is operated at 5GHz with 1.8V supply voltage. These results indicate that the proposed VCO can be used for radio frequency operations replacing LC oscillators. The circuits have been designed and simulated using 0.18um TSMC library.

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.42 no.6
• /
• pp.37-48
• /
• 2005

The efficiency of power supply circuits such as DC-DC converters and batteries varies on the trend of the power consumption because their efficiencies are not fixed. To analyze the efficiency of power supply circuits, we need the temporal behavior of the power consumption of the loads, which is dependent on the activity factors of the devices during the operation. Since it is not easy to model every detail of those factors, one of the most accurate power consumption analyses of power supply circuits is measurement of a real system, which is expensive and time consuming. In this paper, we introduce an active load emulator for embedded systems which is capable of power measurement, logging, replaying and synthesis. We adopt a pattern recognition technique for data compression in that long-term behaviors of power consumption consist of numbers of repetitions of short-term behaviors, and the number of short-term behaviors is generally limited to a small number. We also devise a heterogeneous structure of active load elements so that low-speed, high-current active load elements and high-speed, low-current active load elements may emulate large amount and fast changing power consumption of digital systems. For the performance evaluation of our load emulator, we demonstrate power measurement and emulation of a hard drive. As an application of our load emulator, it is used for the analysis of a DC-DC converter efficiency and for the verification of a low-power frequency scaling policy for a real-time task.