• Journal of the Korean Society for Railway
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• v.20 no.5
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• pp.588-594
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• 2017

Permanent magnet assisted synchronous reluctance motors (PMa-SynRM) show higher efficiency and power density compared to conventional induction motors for high speed railroad traction systems. Furthermore, 5-phase PMa-SynRMs have lower torque ripple and higher power density than 3-phase systems. Therefore, the 5-phase PMa-SynRM is suitable for high-speed railway traction systems. In this study, 3kw 3-phase and 5-phase PMa-SynRM models were optimized using lumped parameter model and genetic algorithm, and their characteristics were compared. The optimized models are fine-tuned using finite element analysis. The final models of the 3-phase and 5-phase PMa-SynRMs are fabricated and tested to verify the analysis results.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.1
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• pp.86-93
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• 2003

This paper describes that the resonant tank type DC-DC converter consist of reactor and capacitor resonant tank circuit for increased the output current. This circuit configuration is composed of the resonant tank circuit used resonant capacitor and reactor and the capacitor connected in switch are a common using by resonance capacitor and ZVS(Zero Voltage Switching) capacitor. Therefore, the proposed converter can reduce a switching losses, noise, and voltage stress at turn-on and turn-on and has an advantage which is able to operating safely in load short, because DC reactor is connected with resonance reactor in order to supply a fixed current with low ripple from DC power supply. The analysis of proposed circuit uses normalized parameters and characteristic estimation is generally described the proposed circuit with the characteristics of power and output voltage etc. Also, design is based on the characteristic estmations in each step. Hence, We conform a rightfulness theoretical analysis by comparing a theoretical values and experimental values obtained from experiment.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.398-401
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• 2011

This paper presents a high-efficiency CMOS PWM DC-DC buck converter. It generates a constant output voltage(1-2.8V), from an input voltage(3.4-3.9V). Inductor-based type is chosen and inductor current is controlled with PWM operation. The designed circuit consists of power switch, Pulse Width Generation, Buffer, Zero Current Sensing, Current Sensing Circuit, Clock & Ramp generation, V-I Converter, Soft Start, Compensator and Modulator. Switching Frequency is 1MHz, It operates in CCM when the load current is more than 40mA, and the maximum efficiency is 98.71% at 100mA. Output voltage ripple is 0.98mV(input voltage:3.5V, output voltage:2.5V). The performance of the designed circuit has been verified through extensive simulation using a CMOS $0.18{\mu}m$ technology.

• The Transactions of the Korean Institute of Power Electronics
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• v.13 no.4
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• pp.295-302
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• 2008

This paper examines the design and the performance of a PMA-RSM(permanent-magnet assisted reluctance synchronous motor) for washing machine. A FEM(finite element method) is used to analyze performance and maximum torque characteristic of the proposed PMA-RSM. The designed motor is a combination of salient poles, which is making reluctance torque, and permanent magnet which are located on the air-gap of rotor to get a enough torque during low speed resign. Typical flux barrier type reluctance synchronous motor and the effects of adding magnet into the flux barrier of the rotor of a PMA-RSM are compared and examined. Also the maximum torque point of the reluctance torque by reluctance and reaction torque by magnetic alignment torque, which is in barrier, of the proposed PMS-RSM are derived through simulation. Using this results, the characteristics analysis of a performance, an average torque and a torque ripple of flux barrier RSM and the proposed PMA-RSM are performed through FEM under the saturation effect respectively.

• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.5
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• pp.491-497
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• 2004

This paper presents a new rotor position estimation method for brushless DC motors. It is clear that the estimation error of the rotor position provokes the phase shift angle misaligned between the phase current and the back-EMF waveforms, which causes torque ripple in brushless DC motor drives. Such an estimation error can be reduced with the help of the proposed neutral voltage-based estimation method that is structured in the form of a closed loop observer. A neutral voltage appearing during the normal mode of the inverter operation is found to be an observable and controllable measure, which can be dealt with for estimating an exact rotor position. This neutral voltage is obtained from the DC-link current, the switching logic, and the motor speed values. The proposed algorithm, which can be implemented easily by using a single DC-link current and the motor terminal voltage sensors, is verified by simulation and experiment results.

• Journal of Power Electronics
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• v.13 no.6
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• pp.939-954
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• 2013

The Direct Torque Control (DTC) technique for Permanent Magnet Synchronous Motors (PMSM) is receiving increased attention due to its simplicity and robust dynamic response when compared with other control techniques. The classical switching table based DTC results in large flux and torque ripples in the motors. Several studies have been reported in the literature on classical DTC. However, there are only limited studies that actually discuss or evaluate the classical DTC. This paper proposes, novel switching table / DTC methods for PMSMs to reduce torque ripples. In this paper, two DTC schemes are proposed. The six sector and twelve sector methodology is considered in DTC scheme I and DTC scheme II, respectively. In both DTC schemes a simple modification is made to the classical DTC structure. The two level inverter available in the classical DTC is eliminated by replacing it with a three level Neutral Point Clamped (NPC) inverter. To further improve the performance of the proposed DTC scheme I, the available 27 voltage vectors are allowed to form different groups of voltage vectors such as Large - Zero (LZ), Medium - Zero (MZ) and Small - Zero (SZ), where as in DTC scheme II, all of the voltage vectors are considered to form a switching table. Based on these groups, a novel switching table is proposed. The proposed DTC schemes are comparatively investigated with the classical DTC and existing literatures through theory analysis and computer simulations. The superiority of the proposed DTC method is also confirmed by experimental results. It can be observed that the proposed techniques can significantly reduces the torque ripples and improves the quality of current waveform when compared with traditional and existing methods.

• Journal of the Korean Vacuum Society
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• v.9 no.3
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• pp.290-295
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• 2000

In order to utilize as a pre-ionization means for reproducible ohmic plasma on KAIST-TOKAMAK, a simple, safe, economical and continuous microwave source has been developed using a home kitchen micro-wave oven. The magnetron used in the study can provide 500 W of power at 2.45 GHz. A conventional magnetron in a home kitchen microwave oven generates microwave for 8 ms at every 16 ms periodically due to the periodic (60 Hz) high voltage applied to the magnetron cathode. In order to generate continuous microwave which is suitable for tokamak pre-ionization, the magnetron operation circuit has been modified using a DC high voltage (5 kV, 1 A) power supply. It provides high-voltage with small ripple for magnetron cathode bias. Using the developed magnetron system, electron cyclotron resonace heated (ECH) plasmas were produced and the characteristics of the system were studied by diagnosing the ECH plasma using Langmuir probe and $H_{\alpha}$ emission diagnostics.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.6
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• pp.239-245
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• 2016

In this study, a 12 V PWM boost converter was designed with the optimal values of the external components of the power stage was well as the compensation stage for smart electronic applications powered by a battery device. The 12 V boost PWM converter consisted of several passive elements, such as a resistor, inductor and capacitor with a diode, power MOS switch and control IC chip for the control PWM signal. The devices of the power stage and compensation stage were designed to maintain stable operation under a range of load conditions as well as achieving the highest power efficiency. The results of this study were first verified by a simulation in SPICE from calculations of the values of major external elements comprising the converter. The design was also implemented on the prototype PCBboard using commercial IC LM3481 from Texas Instruments, which has a nominal output voltage of 12 V. The output voltage, ripple voltage, and load regulation with the line regulation were measured using a digital oscilloscope, DMM tester, and DC power supply. By configuring the converter under the same conditions as in the circuit simulation, the experimental results matched the simulation results.

• Journal of Power Electronics
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• v.11 no.4
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• pp.408-417
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• 2011

The plug-in hybrid electric vehicles (PHEVs) are specialized hybrid electric vehicles that have the potential to obtain enough energy for average daily commuting from batteries. The PHEV battery would be recharged from the power grid at home or at work and would thus allow for a reduction in the overall fuel consumption. This paper proposes an integrated power electronics interface for PHEVs, which consists of a novel Eight-Switch Inverter (ESI) and an interleaved DC/DC converter, in order to reduce the cost, the mass and the size of the power electronics unit (PEU) with high performance at any operating mode. In the proposed configuration, a novel Eight-Switch Inverter (ESI) is able to function as a bidirectional single-phase AC/DC battery charger/ vehicle to grid (V2G) and to transfer electrical energy between the DC-link (connected to the battery) and the electric traction system as DC/AC inverter. In addition, a bidirectional-interleaved DC/DC converter with dual-loop controller is proposed for interfacing the ESI to a low-voltage battery pack in order to minimize the ripple of the battery current and to improve the efficiency of the DC system with lower inductor size. To validate the performance of the proposed configuration, the indirect field-oriented control (IFOC) based on particle swarm optimization (PSO) is proposed to optimize the efficiency of the AC drive system in PHEVs. The maximum efficiency of the motor is obtained by the evaluation of optimal rotor flux at any operating point, where the PSO is applied to evaluate the optimal flux. Moreover, an improved AC/DC controller based Proportional-Resonant Control (PRC) is proposed in order to reduce the THD of the input current in charger/V2G modes. The proposed configuration is analyzed and its performance is validated using simulated results obtained in MATLAB/ SIMULINK. Furthermore, it is experimentally validated with results obtained from the prototypes that have been developed and built in the laboratory based on TMS320F2808 DSP.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.38 no.3
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• pp.40-46
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• 2001

In this paper, a novel low power full adder circuit comprising only 10 transistors is proposed. The circuit is based on the six -transistor CMOS XOR circuit, which generates both XOR and XNOR signals and pass transistors. This adder circuit provides a good low power characteristics due to the smaller number of transistors and the elimination of short circuit current paths. Layouts have been carried out using a 0.65 ${\mu}m$ ASIC design rule for evaluation purposes. The physical design has been evaluated using HSPICE at 25MHz to 50MHz. The proposed circuit has been used to build 2bit and 8bit ripple carry adders, which are used for evaluation of power consumption, time delay and rise and fall time. The proposed circuit shows substantially improved power consumption characteristics, about 70% lower than transmission gate full adder (TFA), and 60% lower than a design using 14 transistors (TR14). Delay and signal rise and fall time are also far shorter than other conventional designs such as TFA and TR14.