• 한국자동차공학회논문집
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• 제8권6호
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• pp.70-78
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• 2000

A balanced vane pump for the use of automotive power steering systems generates a flow ripple which is imposed upon the mean flow rate. The flow ripple interacts with the characteristics of the connected pipes, valves and steering gear in a complex manner to produce a pressure ripple, also known as fluid-borne noise. In order to reduce vibration level and produce quieter and more reliable power steering systems, it is important to measure the flow ripple produced by a pump with high accuracy and fast response. In this paper, the flow ripple generated by a vane pump in automotive power steering systems is measured by the remote instantaneous flow rate measurement method (RIFM) using hydraulic pipeline dynamics. In experiment, flow and pressure ripple wave forms are measured under various operating conditions. Also, the parameters affected upon the flow and pressure ripple are investigated by the frequency analysis.

• Journal of Power Electronics
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• 제10권3호
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• pp.328-333
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• 2010

A photovoltaic power conditioning system (PV PCS) that contains single-phase dc/ac inverters tends to draw an ac ripple current at twice the output frequency. Such a ripple current perturbs the operating points of solar cells continuously and it may reduce the efficiency of the current based maximum power point tracking technique (CMPPT). In this paper, the ripple current generation in a dc link and boost inductor is analyzed using the ac equivalent circuit of a dc/dc boost converter. A new feed-forward ripple current compensation method to incorporate a current control loop into a dc/dc converter for ripple reduction is proposed. The proposed feed-forward compensation method is verified by simulation and experimental results. These results show a 41.8 % reduction in the peak-to peak ac ripple. In addition, the dc/ac inverter control system uses an automatic voltage regulation (AVR) function to mitigate the ac ripple voltage effect in the dc link. A 3kW PV PCS prototype has been built and its experimental results are given to verify the effectiveness of the proposed method.

• Journal of Power Electronics
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• 제10권2호
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• pp.176-180
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• 2010

This paper deals with a control method to reduce the torque ripple of a permanent magnet synchronous motor (PMSM) for electric power steering (EPS) systems. Such an application requires a very low torque ripple in order to maintain a good steering feel. However, because of spatial limitations, it cannot help having a partial saturation in the iron core of the PMSM for an EPS system, and this saturation results in a significant torque ripple. Thus, this paper analyzes the torque ripple caused by the magnetic saturation of a PMSM and proposes a method with respect to inductance measurement to verify the partial saturation. In addition, it is shown that a compensation current is needed in order to minimize the torque ripple when a PMSM is driven in the high torque region. The estimation process of the current and the torque ripple decreased by the current are presented and verified with test results.

• 전력전자학회논문지
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• 제26권5호
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• pp.342-348
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• 2021

The PV module of solar power systems requires maximum power point tracking (MPPT) technique because the power-voltage and current-voltage characteristics vary depending on the surrounding environment. In addition, the 120 Hz ripple voltage on the DC-Link is caused by the imbalance of the system voltage and current. The effect of this 120 Hz ripple voltage reduces the efficiency of the power generation system by increasing the output current distortion rate. Increasing the capacity of DC-Link can reduce the 120 Hz ripple voltage, but this method is inefficient in price and size. We propose a technique that detects 120 Hz ripple voltage and reduces the effect of ripple voltage without increasing the DC-Link capacity through a controller. The proposed technique was verified through simulations and experiments using a 1 kW single-phase solar power system. In addition, the proposed technique's feasibility was demonstrated by reducing the distortion rate of the output current.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2015년도 전력전자학술대회 논문집
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• pp.355-356
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• 2015

This paper proposes a control strategy of total output power ripple cancellation for both of Machine-Side Converter (MSC) and Grid-Side Converter (GSC) in a DFIG under unbalanced grid conditions. The proposed control strategy for the MSC is the zero torque ripple control algorithm with an enhanced LVRT capability. The control algorithm for the MSC exhibits reduced torque pulsation in steady-state unbalanced grid conditions. In addition, this control algorithm also minimizes a peak value of rotor current in transient unbalanced grid conditions. The total output power ripple cancellation control algorithm is adopted in the GSC. The total output power ripple cancellation is achieved by nullifying the oscillating component of the total output active and reactive power at the summing point of stator and rotor of DFIG. The proposed control strategy for the GSC reduces the output power oscillation leading to the improved quality of wind farms output.

• 전력전자학회논문지
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• 제24권3호
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• pp.181-190
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• 2019

Active power decoupling circuits have emerged to eliminate the inherent second-order ripple power in a single-phase power conversion system. This study proposes a design method to determine the optimal capacitance for active power decoupling circuits to achieve high power density. Minimum capacitance is derived by analyzing ripple power in a passive power decoupling circuit, a buck-type circuit, and a capacitor-split-type circuit. Double-frequency ripple power decoupling capabilities are also analyzed in three decoupling circuits under a 3.3 kW load condition for a battery charger application. To verify the proposed design method, the performance of the three decoupling circuits with the derived minimum capacitance is compared and analyzed through the results of MATLAB -Simulink and hardware-in-the-loop simulations.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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• pp.79-84
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• 1998

A novel zero voltage and zero current switching (ZVZCS) full bridge (FB) PWM converter with low output current ripple is presented. A simple auxiliary circuit added in the secondary provides ZVZCS conditions to primary switches, ZVS for leading-leg switches and ZCS for lagging-leg switches, as well as reduces the output current ripple (ideally zero ripple). The auxiliary circuit includes neither lossy components nor additional active switches which are demerits of the previously presented ZVZCS converters. Many advantages including simple circuit topology, high efficiency, low cost and low current ripple make the new converter attractive for high performance high power (＞1kW) applications. The principle of operation, features and design considerations are illustrated and verified on a 2.5kW, 100KHz IGBT based experimental circuit.

• 전력전자학회논문지
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• 제19권3호
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• pp.220-226
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• 2014

Input current ripple and harmonic components of the power device are main causes of electromagnetic interference (EMI). Although the discontinuous conduction mode (DCM) operation can reduce harmonic components of the power device by reducing reverse recovery current of diode and turn-off voltage spikes of the switch, input current ripple increases due to high peak to peak inductor current. Therefore, in this paper, frequency control algorithm is proposed to reduce the input current ripple of DCM operated interleaved boost converter. In the proposed algorithm, duty ratio is fixed either 0.33 or 0.67 to minimize the input current ripple and the switching frequency is controlled according to operating conditions. 600 W 3-phase interleaved boost converter prototype system is built to verify proposed algorithm.

• Journal of Power Electronics
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• 제17권4호
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• pp.1004-1013
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• 2017

This paper presents an interleaving scheme for parallel-connected power systems to reduce the DC-link current ripple. A paralleled generator system generates current ripple by the Pulse Width Modulation (PWM) of each generator side converter. The current ripple in the DC-link degrades the efficiency of the whole generator system and decreases the lifetime of the DC-link capacitors. To mitigate these issues, the expression of the DC-link current is derived by a double-integral Fourier analysis while considering the modulation schemes. Optimized interleaving angles for the parallel generator system are obtained based on an analysis to minimize the dominant current harmonics component. Finally, the proposed interleaving scheme reduces the RMS value of the DC-link current ripple. Simulation and experimental results verify the effectiveness of the proposed interleaving scheme.

• Journal of Power Electronics
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• 제11권5호
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• pp.621-631
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• 2011

In space qualified DC-DC converters, optimization of the following electrical characteristics is of greater interest in comparison with other specifications; power loss/efficiency, output voltage ripple and volume/weight. The main goal of this paper is to present an appropriate solution for optimizing the above mentioned characteristics. For this purpose, a comprehensive power loss model of a DC-DC converter is fully developed. Proper models are also demonstrated for assessment of the output voltage ripple and the utilized transformer volume as the bulkiest component in a DC-DC converter. In order to provide a test bed for evaluation of the proposed models, a 50W push-pull DC-DC converter is designed and implemented. Finally, a novel cost function with three assigned weight functions is proposed in order to have a trade-off among the power loss, the output voltage ripple and the utilized transformer volume of the converter. The cost function is optimized for applications in which volume has the highest priority in comparison with power loss and ripple. The optimization results show that the transformer volume can be decreased by up to 51% and this result is verified by experimental results. The developed models and algorithms in this paper can be used for other DC-DC converter topologies with some minor modifications.