• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.974-976
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• 2001

This paper presents a method to reduce commutation torque ripples occurred during commutation in brushless do motor drives using a single DC-link current sensor. In brushless dc motor drives with a single dc current sensor instead of 3-phase line current sensors, it is noted that dc-link current sensor cannot give any information corresponding to the motor currents during line current commutation intervals. A new technique to resolve such a problem is dealt with based on a deadbeat current control in which motor armature voltage command is computed from a dc-link current reference, an actual current and counter emf voltage. The simulation results show that the proposed method reduces the torque ripple significantly.

• Proceedings of the KIEE Conference
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• 2000.11d
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• pp.794-796
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• 2000

This paper analyzes the method of cascading 74LS163 4-Bit Binary Counters. The 74LS163 4-Bit Binary Counter has synchronous LD. CLR functions and especially ENT, ENP, RCO to cascade some chips in order to count more 4bit binary number. The maximum operating frequency may vary according to the method of cascading. The Data sheet from Texas Instruments introduces two methods, The Ripple Carry Mode Circuit and The Carry Look Ahead Circuit, and shows that The Carry Look Ahead Circuit is more efficient than the other. However, there are only little information for user to understand and apply this to other circuits. Thus, we not only analyzed the two methods but also compared with each other in the point of performance.

• Journal of the Optical Society of Korea
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• v.18 no.2
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• pp.118-123
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• 2014

For multi parameter optimization of Raman Fiber Amplifier (RFA), a simple genetic algorithm is presented in the scenario of a 320 channel Dense Wavelength Division Multiplexed (DWDM) system at channel spacing of 25 GHz. The large average gain (> 22 dB) is observed from optimized RFA with the optimized parameters, such as 39.6 km of Raman length with counter-propagating pumps tuned to 205.5 THz and 211.9 THz at pump powers of 234.3 mW, 677.1 mW respectively. The gain flattening filter (GFF) has also been optimized to further reduce the gain ripple across the frequency range from 190 to 197.975 THz for broadband amplification.

• Proceedings of the KIEE Conference
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• 2000.07b
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• pp.611-613
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• 2000

Rotor eccentricity exists extensively in BLDC motors because of manufacturing imprecision or bearing defects. In this paper, magnetic fields of a BLDC motor with static rotor eccentricity are analyzed by the time- stepping finite element method. Torque ripple, cogging torque, winding current, counter-em! and unbalanced magnetic force characteristics are obtained. These results are compared with those of a non-eccentric BLDC motor.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.33 no.2
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• pp.113-118
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• 2005

This paper shows a satellite battery cell voltage monitor system to make differential voltage measurements when one or both measurement points are beyond voltage range allowed by a conventional differential amplifier. This system is particularly useful for monitoring the individual cell voltage of series-connected cells that constitute a rechargeable satellite battery in which some cell voltages must be measured in the presence of high common mode voltage.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.10
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• pp.40-47
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• 2016

In this paper, a dual mode buck converter with an ability to change mode is proposed, which is suitable particularly for portable device. The problem of conventional mode control circuit is affected by load variation condition such as suddenly or slowly. To resolve this problem, the mode control was designed with slow clock method. Also, when change from the PFM(Pulse Frequency Modulation) mode to the PWM(Pulse Width Modulation) mode, to use the counter to detect a high load. And the user can select mode transition point in load range from 20mA to 90mA by 3 bit digital signal. The circuits are implemented by using BCDMOS 0.18um 2-polt 3-metal process. Measurement environment are input voltage 3.7V, output voltage 1.2V and load current range from 10uA to 500mA. And measurement result show that the peak efficiency is 86% and ripple voltage is less 32mV.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.63 no.4
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• pp.219-225
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• 2014

The purpose of this paper is to control of the low-speed, high-precision PMSM 2-axes pitch/turning. In this paper, apply the PAM-PWM inverter for it. However, The PAM-PWM inverter, control algorithms and hardware is complex. But it is possible to improve the performance in the low-speed operation can reduce the effect of the PWM ripple and Dead Time of inverter by applying suitable DC-bus voltage control. The direct driver PMSM(Permanent Magnet Synchronous Motor) configured to vector control part, PAM control part and the other controller. The vector control part includes PI current, speed control, additional space vector modulation. PAM control part has to have PI voltage controller and P current controller for DC-bus voltage control. Besides, the motor position estimator, the speed estimator and the counter electromotive force and Dead Time Compensation are added. With this arrangement, PMSM was driven with a low pole pitch/turning by performing the current control to the current command or torque command is the paper. As a result, it was possible to minimize the disturbance component that appears in the drive in proportion to the DC voltage magnitude. The use of a hydraulic drive method for a two-axis bubble column is a typical tank. When using the PWM PAM inverter driver is in the turret can be driven by high-precision, low vibration, low noise compared to the hydraulic drive may contribute to the computerization of the turret.

• Journal of IKEEE
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• v.24 no.4
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• pp.1074-1080
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• 2020

This paper proposes a digitally controlled buck converter insensitive to process, voltage and temperature and capable of three modes of operation depending on the state of the output voltage. Conventional digital-controlled buck converters utilized A/D converters, counters and delay line circuits for accurate output voltage control, resulting in increasing the number of counter and delay line bits. This problem can be resolved by employing the 8-bit and 16-bit bidirectional shift registers, and this design technique leads a buck converter to be able to control duty ratio up to 128-bit resolution. The proposed buck converter was designed and fabricated with a CMOS 180 nano-meter 1-poly 6-metal process, generating an output voltage of 0.9 to 1.8V with the input voltage range of 2.7V to 3.6V, a ripple voltage of 30mV, and a power efficiency of up to 92.3%. The transient response speed of the proposed circuit was measured to be 4us.