• ETRI Journal
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• v.33 no.2
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• pp.291-294
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• 2011

This letter proposes an open-ended waveguide antenna with a single split-ring resonator. In contrast to the waveguide antennas incorporating multiple rings reported in a previous study, which exhibited narrow bandwidth, the proposed antenna uses only one ring to achieve broader bandwidth while keeping the aperture small. A single ring has a relatively low quality factor compared to multiple rings. The simulated and measured fractional bandwidth was 4.13% and 4.03%, respectively, which is much broader than the fractional bandwidth of about 1% demonstrated in a previous study. This simple technique can be used in many applications that require small apertures including near-field probes and array elements.

• Proceedings of the IEEK Conference
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• 2007.07a
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• pp.223-224
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• 2007

To develop nuclear measurement system with characteristics including both re-configuration and multi-functions, we proposed a field programmable gate array (FPGA) technique to implement TDC which is more suitable for high energy Physics system. In TDC scheme, the timing resolution is more important than the count rates of channel. In order to manage pico-second resolution TDC, we used the delay components of FPGA, utilized the place and route (P&R) delay difference, and then got two ring oscillators. By setting P&R area constraints, we generated two precise ring oscillators with slightly different frequencies. Finally, we evaluated that the period difference of these two ring oscillators was about 60 pico-seconds, timing resolution of TDC.

• Proceedings of the KIEE Conference
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• 2002.07b
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• pp.641-643
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• 2002

Synchronous generator needs slip-ring and brush for supplying current to rotor with external source. but slip-ring and brush have some problems to supply DC power to field winding with friction and high power loss due to brush voltage drop at high field current. Thus synchronous generator have been designed to brushless machine. Brushless synchronous machines of using permanent halbach array can composed without back core and coreloss. In this paper, analyse on the characteristics of external rotor type permenant magnet brushless with halbach array.

• The Bulletin of The Korean Astronomical Society
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• v.41 no.2
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• pp.62.2-62.2
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• 2016

We present a newly developed algorithm based on a Bayesian method for 2D tilted-ring analysis of disk galaxies which operates on velocity fields. Compared to the conventional ones based on a chi-squared minimisation procedure, this new Bayesian-based algorithm less suffers from local minima of the model parameters even with high multi-modality of their posterior distributions. Moreover, the Bayesian analysis implemented via Markov Chain Monte Carlo (MCMC) sampling only requires broad ranges of posterior distributions of the parameters, which makes the fitting procedure fully automated. This feature is essential for performing kinematic analysis of an unprecedented number of resolved galaxies from the upcoming Square Kilometre Array (SKA) pathfinders' galaxy surveys. A standalone code, the so-called '2D Bayesian Automated Tilted-ring fitter' (2DBAT) that implements the Bayesian fits of 2D tilted-ring models is developed for deriving rotation curves of galaxies that are at least marginally resolved (> 3 beams across the semi-major axis) and moderately inclined (20 < i < 70 degree). The main layout of 2DBAT and its performance test are discussed using sample galaxies from Australia Telescope Compact Array (ATCA) observations as well as artificial data cubes built based on representative rotation curves of intermediate-mass and massive spiral galaxies.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.14 no.3
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• pp.189-196
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• 1989

In this paper, BICMOS gate array technology that has CMOS devices for logic applications and bipolar devices for driver applications is presented. An optimized poly gate p-well CMOS process is chosen to fabricate the BICMOS gate array system and the basic concepts to design these devices are to improve the characteristics of bipolar & CMOS device with simple process technology. As the results hFE value is 120(Ic=1mA) for transistor, and there is no short channel effects for CMOS devices which have Leff to 1.25um and 1.35um for n-channel, respectively, 0.8nx gate delay time of 41 stage ring oscillators is obtained.

• Proceedings of the Optical Society of Korea Conference
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• 2004.02a
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• pp.246-247
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• 2004

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.5
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• pp.81-87
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• 1994

This paper proposes a divider structure that combines a carry-propagation-free division algorithm using RSD number system and a self-timed ring structure. The self-timed ring structure enables the divider to compute at a speed comparable to that of combinational array dividers with less silicon area. By exploiting the carry-propagation-free division algorithm, we can achieve further reduction of silicon area and computation time. The algorithm and structure of the proposed divider have been successfully verified through VHDL modeling and simulation. Preliminary experimental results show the effectiveness of the algorithm and structure.

• Journal of the Korean Mathematical Society
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• v.47 no.2
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• pp.247-261
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• 2010

An associative ring R with identity is called a clean ring if every element of R is the sum of a unit and an idempotent. In this paper, we introduce the concept of f-clean rings. We study various properties of f-clean rings. Let C = $\(\array{A\;V\\W\;B}\)$ be a Morita Context ring. We determine conditions under which the ring C is f-clean. Moreover, we introduce the concept of rings having many full elements. We investigate characterizations of this kind of rings and show that rings having many full elements are closed under matrix rings and Morita Context rings.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.6
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• pp.1040-1048
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• 1987

We propose a hardware architecture called Multiring which is applicable for various geometrical operations on rectilinear objects such as design rule checking in VLSI layout and many image processing operations including noise suppression and coutour extraction. It has both a fast execution speed and extremely high flexibility. The whole architecture is mainly divided into four parts` I/O between host and Multiring, ring memory, linear processor array and instruction decoder. Data transmission between host and Multiring is bit serial thereby reducing the bandwidth requirement for teh channel and the number of external pins, while each row data in the bit map stored in ring memory is processed in the corresponding processor in full parallelism. Each processor is simultaneously configured by the instruction decoder/controller to perform one of the 16 basic instructions such as Boolean (AND, OR, NOT, and Copy), geometrical(Expand and Shrink), and I/O operations each ring cycle, which gives Multiring maximal flexibility in terms of design rule change or the instruction set enhancement. Correct functional behavior of Multiring was confirmed by successfully running a software simulator having one-to-one structural correspondence to the Multiring hardware.

• Journal of Advanced Marine Engineering and Technology
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• v.32 no.2
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• pp.268-275
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• 2008

The shape and array of ice capsules are very important factors in ice thermal storage system because the heat transfer rate of the system strongly depends upon them. In this paper, a new type of ice capsule composed of bar and ring module is proposed to increase the efficiency of the ice thermal storage system. To investigate the heat transfer rate of the proposed ice capsule, numerical analysis of the incompressible Navier-Stokes equations is performed to compare the proposed bar and ring system with the conventional ice capsules. It is shown that the ice capsule composed of bar and ring has a higher heat transfer rate and a low outlet temperature than the conventional ice capsules for various packing ratios and entrance velocities. Furthermore, it is found that the optimal entrance velocity exists between 0.005 m/s and 0.007 m/s from the present numerical analysis.