• Korean Journal of Poultry Science
• /
• v.35 no.2
• /
• pp.115-121
• /
• 2008

The study was conducted to evaluate the effects of dietary microbial phytase on egg productivity, egg quality, phosphorus utilization and nutrient digestibility in laying hens. The animals used in the experiment were a total of 120 Hy-Line Brown laying hens (32 weeks old). Dietary treatments included 1) CON (basal diet), 2) LP (low phosphorus diet) 3) NP (low phosphorus diet + 0.03% normal microbial phytase) and 4) CP (low phosphorus diet + 0.03% coated microbial phytase). Six laying hens were allotted to a block (pen) with five replicated. Through the whole period of experiment, egg production was significantly increased in CON and CP treatments compared to LP treatment (P<0.05). CON, CP and NP treatments significantly increased their egg shell breaking strength and egg shell thickness compared to LP treatment (P<0.05). CON, CP and NP treatments resulted higher yolk color and Haugh unit than LP treatment (P<0.05). Calcium and inorganic phosphorus contents in blood were higher in CP treatment compared to LP treatment (P<0.05). Dry matter digestibility and nitrogen digestibility were greater in CP treatment than CON, LP and NP treatments (P<0.05). Crude ash was increased in CON, CP and NP treatments compared to LP treatment (P<0.05). Calcium digestibility and phosphorus digestibility were significantly improved in CP and NP treatments than CON and LP treatments (P<0.05). Calcium retention of CON, CP and NP treatments were higher than LP treatment (P<0.05). Phosphorus retention was increased in CP and NP treatments compared to CON and LP treatments (P<0.05). LP treatment significantly increased their nitrogen, calcium excretion compared to CON, CP and NP treatments (P<0.05). Phosphorus excretion was decreased in LP, CP and NP treatments compared to CON treatment (P<0.05). In conclusion, CP treatment improved egg production, egg quality, inorganic calcium and phosphorus in blood, calcium and phosphorus retention and nutrient digestibility and decreased nitrogen and calcium excretion in laying hens.

• Korean Journal of Poultry Science
• /
• v.33 no.2
• /
• pp.133-139
• /
• 2006

This study was conducted to investigate the effects of dietary supplementation of Biotite V on growth performance, nutrients digestibility and serum and meat cholesterol in broiler chickens. A total of four hundred and eighty Arbor Acre broilers (male, 2-d-old) were used in current feeding trial for 5 weeks. Broilers were allocated to three dietary treatments with eight replications per treatment and twenty broilers per pen according to a randomized complete block design. Dietary treatments included: 1) CON (basal diet), 2) BV200 (basal diet+200 mesh Biotite V 1.5%) and 3) BV325 (basal diet+325 mesh Biotite V 1.5%). During the first week of experiment, Biotite V increased weight gain in treatment groups compared to CON treatment (P<0.05). Through the entire experimental period, weight gain, feed intake and feed/gain had no significant differences among the treatments (P>0.05). Digestibilities of DM and N were also not affected when diets included Biotite V (P>0.05). No effects were observed in Biotite V supplemented treatments compared to CON treatment on abdominal fat weight, meat and serum cholesterol concentrations (P>0.05). In conclusion, supplementation of Biotite V in broiler diets has no influence on growth performance, nutrients digestibility and can not decrease the cholesterol concentrations in meat and serum.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.15 no.11
• /
• pp.6845-6848
• /
• 2014

This paper proposes a system design of IDS for detecting and defending against DDoS attacks on a network. The proposed system has three parts; the Alert, Attack Analyzer and Defense agent. When the server resource was reduced too much by incoming traffic, the Alert Agent sends message and traffic information to the Attack Analyzer. The message and traffic to the Attack analyzer include only the sender & receiver address and packet numbers for minimizing the overload of Attack Analyzer. Message Received Attack Analyzer investigates the Message. If the pattern of traffic is the same as the DDoS Style, the Analyzer sends a message to the Defense Agent to block that traffic. In this system, at the serious state of the server-down, the Attack analyzer uncovers the DDoS Attacker and send a message to the Defense Agent to block that traffic. This works for server reactivation as soon as possible.

• Journal of Korea Multimedia Society
• /
• v.14 no.11
• /
• pp.1458-1466
• /
• 2011

Recently the research on GPGPU has been carried out actively as the performance of GPUs has been increased rapidly. In this paper, we propose the system architecture by benchmarking the existing supercomputer architecture for a cost-effective system using GPUs in low-cost graphics devices and implement a GPU cluster system with eight GPUs. We also make the software development environment that is suitable for the GPU cluster system and use it for the performance evaluation by implementing the n-body problem. According to its result, we found that it is efficient to use multiple GPUs when the problem size is large due to its communication cost. In addition, we could calculate up to eight million celestial bodies by applying the method of calculating block by block to mitigate the problem size constraint due to the limited resource in GPUs.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.33 no.7A
• /
• pp.693-701
• /
• 2008

In OFDMA (Orthogonal Frequency Division Multiple Access) system that frequency reuse factor is 1, as the same channels in the neighborhood cells creates inter-cell co-channel interference which provides a resource underutilization problem, channel allocation schemes to minimize inter-cell interference have been studied. This paper proposes a new CNIR (Carrier to Noise and Interference Ratio)-based distributed Inter-cell DCA (Dynamic Channel Allocation) algorithm in the OFDMA environment with frequency reuse factor of 1. When a channel allocation is requested, if there is not a free channel in home cell or the available free channels in home cell do not satisfy a required threshold value, the proposed Inter-cell DCA algorithm finds CNIR values of available free channels in the neighborhood cells and then allocates a free channel with maximum CNIR value. Through the simulation results, we find that the proposed scheme decreases both new call block rate and forced termination rate due to new call generation at the same time because it increases channel allocation probability.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.2
• /
• pp.85-92
• /
• 2009

This paper proposes a full-search block-matching motion estimation circuit with hybrid architecture combining systolic arrays and adder trees for an MPEG-4 encoder. The proposed circuit uses systolic arrays for motion estimation with a small number of clock cycles and adder trees to reduce required circuit resources. The interpolation circuit for 1/2 pixel motion estimation consists of six adders, four subtracters and ten registers. We improved the circuit performance by resource sharing and efficient scheduling techniques. We described the motion estimation circuit for integer and 1/2 pixels at RTL in Verilog HDL. The logic-level circuit synthesized by using 130nm standard cell library contains 218,257 gates and can process 94 D1($720{\times}480$) image frames per second.

• Journal of Advanced Navigation Technology
• /
• v.14 no.2
• /
• pp.266-271
• /
• 2010

In this paper, we chose IOPS(input output operation per second) and MB/s as a performance standard, and we developed the evaluation standard for the storage performance. Since there is no vendor-neutral evaluation criteria for storage performance, it is difficult to evaluate storage performance and design the storage resource's sizing. We proposed block size for measurement of the storage's IOPS for OLTP(online transaction processing) application to 4KB, 8KB and 16KB and read/write rate of it to 7:3. On the other hand, we proposed block size for measurement of the storage's IOPS for backup, VOD, Large file processing) to 64KB, 256KB and 1024KB and read/write rates of it to 7:3 and 1:0. Finally, we proposed the Vdvench BMT tool, which is independent on platform. We also developed the result reporting tool for developed evaluation criteria.

• Economic and Environmental Geology
• /
• v.43 no.4
• /
• pp.349-358
• /
• 2010

For imaging complex subsurface structures such as salt dome, faults, thrust belt, and folds, seismic prestack reverse-time migration in depth domain is widely used, which is performed by the cross-correlation of shot-domain wavefield extrapolation with receiver-domain wavefield extrapolation. We apply the prestack reverse-time migration, which had been developed at KIGAM, to the seismic field data set of Block 5 in Jeju basin of Korea continental shelf in order to improve subsurface syncline stratigraphy image of the deep structures under the shot point 8km at the surface. We performed basic data processing for improving S/N ratio in the shot gathers, and constructed a velocity model from stack velocity which was calculated by the iterative velocity spectrum. The syncline structure of the stack image appears as disconnected interfaces due to the diffractions, but the result of the prestack migration shows that the syncline image is improved as seismic energy is concentrated on the geological interfaces.

• Journal of KIISE:Computer Systems and Theory
• /
• v.32 no.5
• /
• pp.232-242
• /
• 2005

This paper concerns automatic hardware synthesis from data flow graph (DFG) specification for fast HW/SW cosynthesis. A node in BFG represents a coarse grain block such as FIR and DCT and a port in a block may consume multiple data samples per invocation, which distinguishes our approach from behavioral synthesis and complicates the problem. In the presented design methodology, a dataflow graph with specified algorithm can be mapped to various hardware structures according to the resource allocation and schedule information. This simplifies the management of the area/performance tradeoff in hardware design and widens the design space of hardware implementation of a dataflow graph compared with the previous approaches. Through experiments with some examples, the usefulness of the proposed technique is demonstrated.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.53 no.1
• /
• pp.86-96
• /
• 2016

Recently, virtualization is becoming the critical issue in the cloud computing due to its advantages of resource utilization and consolidation. In order to efficiently use virtualization services, several issues should be taken into account, including data reliability, security, and performance. In particular, a high write bandwidth on the virtual machine must be guaranteed to provide fast responsiveness to users. In this study, we implemented a way of visualizing comparison results between the block write pattern of KVM-based virtual machine and that of the real machine. Our final objective is to propose an optimized virtualization environment that enables to accelerate the disk write bandwidth.