• 한국세라믹학회지
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• 제39권12호
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• pp.1149-1152
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• 2002

실리콘의 고압상을 연구하는 수단으로 압입 방법을 사용하였다. 실험에는 (100)과 (111) 실리콘 웨이퍼를 사용하였으며 하중유지 시간과 하중인가 속도에 따른 잔류상의 변화를 연구하였다. 압입 후의 상분석에는 Raman spectroscopy를 사용하였다. 하중 유지 시간의 실험결과 (111) 시편에서는 하중 유지 시간이 길어질수록 소성변형이 진행되어 고압상인 Si-III 와 Si-XII는 결정구조를 유지하지 못하고 사라지고 대신 a-Si가 관찰되었다. 하중 인가 속도 실험 결과 하중 인가 속도가 0.1 mm/min일 경우 모든 시편의 force/displacement 곡선에서 pop-in을 관찰할 수 있었다. Raman peak 분석 결과 이들 시편에서는 상전이가 관찰되었다. 5 mm/min의 하중인가 속도의 경우 (111) 시편에서는 급격한 변형의 증가 부분이 관찰되었으나 (100) 시편의 경우 관찰되지 않았다. 하중인가 속도가 느릴 경우 상전이 양상이 뚜렷하게 나타났으며 반대의 경우 상전이는 소량 관찰되거나 관찰되지 않았다. 이것은 하중인가속도가 상전이 영역의 부피에 영향을 주기 때문이라 판단된다.

• Biotechnology and Bioprocess Engineering:BBE
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• 제8권4호
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• pp.246-251
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• 2003

The blood-brain barrier (BBB) is composed of the brain capillaries, which are lined by endothelial cells displaying extremely tight intercellular junctions. Several attempts at creating an in vitro model of the BBB have been met with moderate success as brain capillary endothelial cells lose their barrier properties when isolated in cell culture. This may be due to a lack of recreation of the in vivo endothelial cellular environment in these models, including nearly constant contact with astrocyte foot processes. This work is motivated by the hypothesis that growing endothelial cells on one side of an ultra-thin, highly porous membrane and differentiating astrocyte or astrogliomal cells on the opposite side will lead to a higher degree of interaction between the two cell types and therefore to an improved model. Here we describe our initial efforts towards testing this hypothesis including a procedure for membrane fabrication and methods for culturing endothelial cells on these membranes. We have fabricated a 1 $\mu\textrm{m}$ thick, 2.0 $\mu\textrm{m}$ pore size, and 55% porous membrane with a very narrow pore size distribution from low-stress silicon nitride (SiN) utilizing techniques from the microelectronics industry. We have developed a base, acid, autoclave routine that prepares the membranes for cell culture both by cleaning residual fabrication chemicals from the surface and by increasing the hydrophilicity of the membranes (confirmed by contact angle measurements). Gelatin, fibronectin, and a 50/50 mixture of the two proteins were evaluated as potential basement membrane protein treatments prior to membrane cell seeding. All three treatments support adequate attachment and growth on the membranes compared to the control.

• 센서학회지
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• 제8권3호
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• pp.265-273
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• 1999

본 논문에서는 MEMS 공정에 많이 사용되는 tetraethoxysilane (TEOS) 산화막, low temperature oxide (LTO), 7 wt%, 10 wt% phosphosilicate glass (PSG)의 잔류응력을 Euler beam과 bent-beam strain sensor를 제작하여 측정하였다. 이러한 산화막 잔류응력 측정 구조물을 만들기 위해 다결정실리콘을 희생층으로 사용하였으며 $XeF_2$를 이용하여 희생층 식각을 하였다. 먼저 각 산화막의 증착 당시 잔류응력을 측정한 후 $500^{\circ}C$에서 $800^{\circ}C$까지 질소분위기에서 1 시간 동안 열처리하였다. 또 표면미세가공에서 가장 많이 사용되는 $585^{\circ}C$, $625^{\circ}C$ 다결정실리콘 증착 조건에서 열처리하여 산화막의 잔류응력 변화를 측정하였다. 측정 결과 TEOS와 LTO, 7 wt% PSG는 $600^{\circ}C$ 이하에서 압축잔류응력이 줄어들다가 그 이상에서 다시 커지는 반면에 phosphorus 농도가 높은 10 wt% PSG의 경우는 $500^{\circ}C$이상에서 압축잔류응력이 증가하는 것을 확인하였다. 또 7 wt% PSG가 $585^{\circ}C$ 다결정실리콘 증착 시 가장 작은 잔류응력을 나타내었다.

• 센서학회지
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• 제22권3호
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• pp.175-180
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• 2013

This paper describes the characteristics of cubic silicon carbide (3C-SiC) films grown on a carbonized Si(100) substrate, using hexamethyldisilane (HMDS, $Si_2(CH_3)_6$) as a safe organosilane single precursor in a nonflammable $H_2$/Ar ($H_2$ in Ar) mixture carrier gas by atmospheric pressure chemical vapor deposition (APCVD) at $1280^{\circ}C$. The growth process was performed under various conditions to determine the optimized growth and carbonization condition. Under the optimized condition, grown film has a single crystalline 3C-SiC with well crystallinity, small voids, low residual stress, low carrier concentration, and low RMS. Therefore, the 3C-SiC film on the carbonized Si (100) substrate is suitable to power device and MEMS fields.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.6-6
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• 2010

This paper describes that single crystal cubic silicon (3C-SiC) films have been deposited on carbonized Si(100) substrate using hexamethyldisilane(HMDS, $Si_2(CH_3)_6$) as a safe organosilane single-source precursor and a nonflammable mixture of Ar and $H_2$ gas as the carrier gas by APCVD at $1280^{\circ}C$. The 3C-SiC film had a very good crystal quality without defects due to viods, a very low residual stress.

• 대한기계학회논문집A
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• 제29권3호
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• pp.425-431
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• 2005

The efficiency of complex slurry preparation route for developing the high performance SiC matrix of $RS-SiC_{f}/SiC$ composites has been investigated. The green bodies for RS-SiC materials prior to the infiltration of molten silicon were prepared with various C/SiC complex slurries, which associated with both the sizes of starting SiC particles and the blending conditions of starting SiC and C particles. The characterization of Rs-SiC materials was examined by means of SEM, EDS and three point bending test. Based on the mechanical property-microstructure correlation, the process optimization is also discussed. The flexural strength of Rs-SiC materials greatly depended on the content of residual Si. The decrease of starting SiC particle size in the C/SiC complex slurry was effective for improving the flexural strength of RS-SiC materials.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2003년도 춘계학술대회
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• pp.376-380
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• 2003

The microstructure and the mechanical properties of RS-SiC and RS-$SiC_f/SiC$ materials have been investigated in conjunction with the content of residual silicon and porosity. The mechanical properties of RS-SiC materials suffered from the thermal exposure were also examined. RS-SiC based materials bave been fabricated using the complex matrix slurry with different composition ratios of SiC and C panicles. The characterization of RS-SiC based materials was investigated by means of SEM, EDS ~d three point bending test. Based on the mechanical property-microstructure correlation, the high temperature applicability of RS-SiC based materials was discussed.

• 동력기계공학회지
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• 제5권2호
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• pp.36-42
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• 2001

This paper deals with finite element analyses of residual stresses causing popping up which are induced in micromachining processes of a microaccelerometer sensors. The paddle of the micro accelerometer sensor is designed symmetric with respect to the direction of the beam. After heating the tunnel gap up to 100 degree and get it through the cooling process and the additional beam up to 80 degree and get it through the cooling process. We learn the thermal internal stresses of each shape and compare the results with each other, after heating the tunnel gap up to 400 degree during the Pt deposition process. Finally we find the optimal shape which is able to minimize the internal stresses of microaccelerometer sensor. We want to seek after the real cause of this pop up phenomenon and diminish this by change manufacturing processes of microaccelerometer sensor by electrostatic force.

• 전자공학회논문지D
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• 제35D권7호
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• pp.94-101
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• 1998

To form 0.2 .mu.m p$^{+}$-n junctions, BF$_{2}$ ions with the energy of 20keV and the dose of 2*10$^{15}$ cm$^{-2}$ were implanted into the crystalline and preamorphized silicon substrates. Th epreamorphization was performed using 45keV, 3*10$^{14}$ cm$^{-2}$ As or Ge ions. Th efurnace annealing and rapid thermal annealing were empolyed to annihilate the implanted damage and to activate the implanted boron ions.The junction properties were analyzed with the measured values of the junction depth, sheet resistances, residual defects, and leakage currents. The thermal cycle of furnace annela followed by rapid thermal annela shows better characteristics than the annealing sequence of rapid thermal anneal and furnace annela.Among the premorphization species, Ge ion exhibited the better characteristics than the As ion.n.

• 전자공학회논문지A
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• 제32A권12호
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• pp.122-129
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• 1995

The most important feature of a-Si TFT is dense localized states such as dangling bonds which exist in tis bandgap. Electrons trapped by localized states dominate the potential distribution in the active a-Si region ,and influence the performance of a-Si TFT. In this paper, we describe the electrical characteristics of a-Si TFT with respect to trap distribution within bandgap, electron mobility and interface states using 2-Dimensional device simulator and compare the result of simulation with measurements. Using the mixed-mode simulator, we can predict the potential variation of pixel which causes residual image problem during the turn-off of a-Si TFT driving circuit. Therefore it is possible to consider trade-off between potential variation of pixel and turn-on current of a-Si TFT for the optimized driving circuit.