• Title/Summary/Keyword: Register Error

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Anomaly Detection Technique of Satellite on Network RTK (Network RTK 환경에서 위성에 의한 이상 검출 기법)

  • Shin, Mi Young;Cho, Deuk Jae;Yoo, Yun-Ja;Hong, Cheol-Ye;Park, Sang-Hyun
    • Journal of Navigation and Port Research
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    • v.37 no.1
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    • pp.41-48
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    • 2013
  • A positioning technique using the augmentation system has been researched to improve the accuracy. The network RTK is the precise positioning technique using carrier phase correction data from reference stations and is constantly being researched. The study for the system accuracy has been performed but system integrity research has not been done as much as system accuracy. In this paper, we presented the anomaly detection algorithm by satellite system and the diagnosis algorithm to a basic research in the integrity on network RTK. And the presented algorithms are verified on the DL-V3 dual-frequency receiver and the simulated error scenario using the GSS7700.

Middleware to Support Real-Time in the Linux User-Space (리눅스 사용자 영역에 실시간성 제공을 위한 미들웨어)

  • Lee, Sang-Gil;Lee, Seung-Yul;Lee, Cheol-Hoon
    • The Journal of the Korea Contents Association
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    • v.16 no.5
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    • pp.217-228
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    • 2016
  • Linux it self does not support real-time. To solve this problem RTiK-Linux was designed to support real-time in the kernel space. However, since the user space does not support real-time, it is not easy to develop application. In this paper, we designed and implemented a RTiK-middleware to support real-time in the user space. RTiK-middleware provides real-time scheduling for user space through signal request period after to register process information with request period using apis on application. To evaluate the performance of the proposed RTiK-middleware, we measured the periods of generated real-time threads using RDTSC instructions, and verified that RTiK-middleware operates correctly within the error ranges of 1ms.

A Study on Registration Data Analysis of National Immunization Registry Information System (예방접종등록 정보시스템의 등록자료 분석에 관한 연구)

  • Kim, Chang-su;Park, Ok;Kim, Mi-young;Kim, Myung-jin;Lee, Sok-goo;Jung, Hoe-kyung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.5
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    • pp.1151-1156
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    • 2015
  • In this study, the accuracy duplication and register rate of the vaccination registration data in National Immunization Registry Information System were evaluated and analyzed. Through which undocumented vaccination status data, duplicate data, missing data, errors data into the vaccination registration data were analyzed. In addition, the quality control for the vaccination registration database quality improvement, were proposed for standard error checking. In this paper, we propose an efficient validation of a quality management system of the database.

Implementation of a Grant Processor for Upstream Cell Transmission at the ONU in the ATM-PON (ATM-PON의 ONU에서 상향 셀 전송을 위한 승인처리기의 구현)

  • 우만식;정해;유건일
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.5C
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    • pp.454-464
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    • 2002
  • In the ATM-PON (Asynchronous Transfer Mode-Passive Optical Network), the downstream cell transmitted by an OLT is broadcast to all ONUs. The ONU receives selectively its own cells by VP filtering. On the other hand, the upstream cell can be transmitted by ONU in the case of receiving a grant from the OLT. After providing the grant to an ONU, the OLT expects the arrival of a cell after an elapse of the equalized round trip delay. ITU-T G.983.1 recommends that one bit error is allowed between the expected arrival time and the actual arrival time at the OLT. Because the ONU processes the different delay to each type of grant (ranging, user cell, and mimi-slot grant), it is not simple to design the transmission part of ONU. In this paper, we implement a grant processor which provides the delay accurately in the ONU TC chip with the FPGA. For the given equalized delay, it deals with the delay for the cell, the byte, and the bit unit by using the shift register, the byte counter, and the D flip-flop, respectively. We verify the operation of the grant processor by the time simulation and the measurement of the optical board output.

Evaluating non-coincident Cadastral Parcel Using Google Earth Web (Google Earth Web을 활용한 지목 불부합 필지 평가)

  • Kim, Dae-Ho;Um, Jung-Sup
    • Proceedings of the Korean Association of Geographic Inforamtion Studies Conference
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    • 2010.06a
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    • pp.9-18
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    • 2010
  • This study investigated the cadastral non-coincidence between real land using and cadastral book using Google Earth Web for difficult area to access that is more efficient method compared with field survey for saving time and money. An reading error has occurred eight parcels about dry field and paddy field but this method is more powerful in case of a danger area of steep, unregistered cemeteries of cadastral book using Google Earth Web of image interpretation that method takes 1 day, the accuracy is 96% and improved 20% more than field survey takes 5 days by 40 parcels. It's possible to reduce the manpower, time and budget could be minimized. In particular, it is need to land alteration of forests and fields category that finds 47 locations a burial ground of non register cadastre book. Google Earth Web method is enabling easy visual analysis of the future land administration of local governments to improving the reliability of temporal and economic costs can be very useful to reduce.

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Lane Violation Detection System Using Feature Tracking (특징점 추적을 이용한 끼어들기 위반차량 검지 시스템)

  • Lee, Hee-Sin;Lee, Joon-Whoan
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.8 no.2
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    • pp.36-44
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    • 2009
  • In this paper, we suggest a system of detecting a vehicle with lane violation, which can detect the vehicle with lane violation, by using the feature point tracking. The whole algorithm in the suggested system of detecting a vehicle with lane violation is composed of three stages such as feature extraction, register and tracking in feature for the tracking-targeted vehicle, and detecting a vehicle with lane violation. In the stage of feature extraction, the feature is extracted from the inputted image by sing the feature-extraction algorithm available for the real-time processing. The extracted features are again selected the racking-targeted feature. The registered feature is tracked by using NCC(normalized cross correlation). Finally, whether or not lane violation is finally detected by using information on the tracked features. As a result of experimenting the suggested system by using the acquired image in the section with a ban on intervention, the excellent performance was shown with 99.09% for positive recognition ratio and 0.9% for error ratio. The fast processing speed could be obtained in 34.48 frames per second available for real-time processing.

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FSM Designs with Control Flow Intensive Cycle-C Descriptions (Cycle-C를 이용한 제어흐름 중심의 FSM 설계)

  • Yun Chang-Ryul;Jhang Kyoung-Son
    • Journal of KIISE:Computing Practices and Letters
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    • v.11 no.1
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    • pp.26-35
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    • 2005
  • Generally, we employ FSMs for the design of controllers in digital systems. FSMs are Implemented with state diagrams generated from control flow. With HDL, we design and verify FSMs based on state diagrams. As the number of states in the system increases, the verification or modification processes become complicated, error prone and time consuming. In this paper, we propose a control flow oriented hardware description language at the register transfer level called Cycle-C. Cycle-C describes FSMs with timing information and control How intensive algorithms. The Cycle-C description is automatically converted into FSMs in the form of synthesizable RTL VHDL. In experiments, we design FSMs for control intensive interface circuits. There is little area difference between Cycle-C design and manual design. In addition, Cycle-C design needs only 10~50% of the number lines of manual RTL VHDL designs.

Model Validation of a Fast Ethernet Controller for Performance Evaluation of Network Processors (네트워크 프로세서의 성능 예측을 위한 고속 이더넷 제어기의 상위 레벨 모델 검증)

  • Lee Myeong-jin
    • Journal of KIISE:Computing Practices and Letters
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    • v.11 no.1
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    • pp.92-99
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    • 2005
  • In this paper, we present a high-level design methodology applied on a network system-on-a-chip(SOC) using SystemC. The main target of our approach is to get optimum performance parameters for high network address translation(NAT) throughput. The Fast Ethernet media access controller(MAC) and its direct memory access(DMA) controller are modeled with SystemC in transaction level. They are calibrated through the cycle-based measurement of the operation of the real Verilog register transfer language(RTL). The NAT throughput of the model is within $\pm$10% error compared to the output of the real evaluation board. Simulation speed of the model is more than 100 times laster than the RTL. The validated models are used for intensive architecture exploration to find the performance bottleneck in the NAT router.

Implementation of SNR Estimator for ISDB-T Systems (ISDB-T 시스템을 위한 SNR 추정기 구현)

  • Kim, Seongihl;Sohn, Chae-Bong
    • Journal of Broadcast Engineering
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    • v.18 no.6
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    • pp.927-934
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    • 2013
  • This paper aims to realize a Signal to Noise Ratio Estimator which constitutes a critical index of the broadcasting system in OFDM system with a synchronized type based on ISDB-T system. Of the elements which are comprising OFDM segments of ISDB-T system using the MSE algorithm suitable for ASIC design owing to its low complexity among a diverse SNR estimation methods, SNR estimation method using the broadcasting information data and the SNR estimation method using scattered pilot signal were realized by RTL. These two methods were compared in terms of their performance through simulation test not only in the AWGN channel which is an ideal channel, but also in SFN channel and frequency selective fading channel, which are distorted channels. Complexity of two methods were also compared through RTL realization. As a result of this comparison analysis, it was concluded that the SNR estimation method using scattered pilot signal shows more excellent performance and easiness in realization.

Comparison of Areal Accuracy in Cadastral Uncoincidence using the RTK-GPS (RTK-GPS를 이용한 지적불부합지의 면적 정확도 비교)

  • Jang, Sang-Kyu;Kim, Jin-Soo;Lee, Oong-Lak
    • Journal of Korean Society for Geospatial Information Science
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    • v.10 no.3 s.21
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    • pp.107-114
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    • 2002
  • The cadastral surveying is essential for the effective management of a country, the D/B building of NGIS. Many of GPS applications require a positioning accuracy of several centimeters for rover in real-times. But, to achieve higher positioning accuracies in real-time, the double differencing technique should be implemented using carrier phase data. Corrected observations at the reference station can be transmitted and used to form double difference observations at the rover using a data link. In this study, the area accuracy of cadastral survey using the RTK GPS will be assessed, and will produce area of parcel of land. As the result of comparison among area by TS, planer surveying and RTK GPS. parcels-register for site is analyzed by this data. The results show that mean error of area calculated min. $2.42m^{2}{\sim}\;max.\;13.69m^{2}$ and RMSE calculated min. $0.00329\;{\sim}\;max.\;0.01846$.

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