• Journal of the Institute of Convergence Signal Processing
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• v.17 no.1
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• pp.26-31
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• 2016

In this paper, we propose an image quality evaluation system for compact camera module and assess the effect of optical performance improvement for proposed anti-halation disk in small lens. We develop a image quality evaluation system for quality estimation of camera module image. And we also develop a program to control register in image signal processor. Finally the resolution, brightness, and color reproduction performances were evaluated image quality comparison between conventional and proposed camera module using developed quality evaluation system and ISP register control program.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.1C
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• pp.102-110
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• 2004

In this paper, we propose a VLSI structure of real-time image compression and reconstruction processor using 2-D discrete wavelet transform and implement into a hardware which use minimal hardware resource using ASIC library. In the implemented hardware, Data path part consists of the DWT kernel for the wavelet transform and inverse transform, quantizer/dequantizer, the huffman encoder/huffman decoder, the adder/buffer for the inverse wavelet transform, and the interface modules for input/output. Control part consists of the programming register, the controller which decodes the instructions and generates the control signals, and the status register for indicating the internal state into the external of circuit. According to the programming condition, the designed circuit has the various selective output formats which are wavelet coefficient, quantization coefficient or index, and Huffman code in image compression mode, and Huffman decoding result, reconstructed quantization coefficient, and reconstructed wavelet coefficient in image reconstructed mode. The programming register has 16 stages and one instruction can be used for a horizontal(or vertical) filtering in a level. Since each register automatically operated in the right order, 4-level discrete wavelet transform can be executed by a programming. We synthesized the designed circuit with synthesis library of Hynix 0.35um CMOS fabrication using the synthesis tool, Synopsys and extracted the gate-level netlist. From the netlist, timing information was extracted using Vela tool. We executed the timing simulation with the extracted netlist and timing information using NC-Verilog tool. Also PNR and layout process was executed using Apollo tool. The Implemented hardware has about 50,000 gate sizes and stably operates in 80MHz clock frequency.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.12
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• pp.9-19
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• 1997

This paper describes the design and FPGA implementation of a system control unit within a multiprocessor chip which can be used as a node processor ina massively parallel processing (MPP) caches, memory management units, a bus unit and a system control unit. Major functions of the system control unit are locking/unlocking of the shared variables of protected access, synchronization of instruction execution among four integer untis, control of interrupts, generation control of processor's status, etc. The system control unit was modeled in very high level using verilog HDL. Then, it was simulated and verified in an environment where trap handler and external interrupt controller were added. Functional blocks of the system control unit were changed into RTL(register transfer level) model and synthesized using xilinx FPGA cell library in synopsys tool. The synthesized system control unit was implemented by Xilinx FPGA chip (XC4025EPG299) after timing verification.

• The Transactions of the Korea Information Processing Society
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• v.5 no.5
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• pp.1345-1356
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• 1998

Prolog tailoring technique, an optimization method to improve the execution speed of a procedure, is proposed in this paper. When a procedure is frequently and repeatedly called and the machine has a lot of callee-saved registers, optimizing prolog and epilog can become an important step of optimization. Epilg tailoring supported by IBM XL C Compiler has been known to improve procedure's execution speed by reducing register restore instructions on execution paths, but no algorithms for prolog tailoring has been proposed yet. The prolog generated by the prolog tailoring algorithm proposed in this paper executes considerably smaller number of register save instructions at run-time. This means the total number of instructions to be executed is decreased resulting in an improvement on the procedure's execution speed. To maintain the correctness of code, prolog code should not be inserted inside diamond structures of loop structures. This paper proposes a prolog tailoring technique which generates register save instructions at the best position in a control flow graph while not allowing the insertion of any prolog code inside diamond structures of loop structures.

• Journal of Fisheries and Marine Sciences Education
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• v.28 no.1
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• pp.34-46
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• 2016

This study analyzes inspection results of ships by Port State Control. Particularly, this research focuses on a detention trend of vessels that registered to Korean Register of Shipping. In order to conduct this research, we have searched 170 ships that got a detention with a Code-30 within recent 46 months period. The deficiencies of the detentions are inspected by ship types, ship years, flags, ports inspected, and criteria. Moreover, we categorized the deficiencies for the detentions into 17 types for internal and external inspections. As the results of the comparison study, bulk and general cargo carriers dominate the portion of detentions by almost 66 percent. Self-induced detention due to a lack of preparation by crews and company support are the main reasons of repeated detentions from the same type ships. Ships between six and ten years old show the lowest detention rate by 4 percent whereas ships less than five years old generate the highest detention rate by 22 percent. The main categories of the detentions from ships less than 5 years old are a lack of documentation and certification, and the clues support our opinion that owners and crews may neglect to prepare the inspections because their strong confidence for the ship condition due to young ship age. As a result of a great effort of Korean government and shipping companies to reduce a detention rate, the detention rate has been recently reduced to 0.3 percent. The results also require companies with the flag of convenience ships to spend more effort to reduce the detention rate, too. We expect that using social networking service by Korea Register will lower the detention rate by sharing relevant information real-time to ships and owners.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.592-595
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• 2008

This paper presents development of automatic image quality register optimization system using mobile TFT-LCD (Thin Film Transistor-Liquid Crystal Display) driver IC and embedded software. It optimizes automatically gamma adjustment and voltage setting registers in mobile TFT-LCD driver IC to improve gamma correction error, adjusting time, flicker noise and contrast ratio. Developed algorithms and embedded software are generally applicable for most of the TFT-LCD modules. The proposed optimization system contains module-under-test (MUT, TFT-LCD module), control program, multimedia display tester for measuring luminance, flicker noise and contrast ratio, and control board for interface between PC and TFT-LCD module. The control board is designed with DSP and FPGA, and it supports various interfaces such as RGB and CPU.

• Journal of Ocean Engineering and Technology
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• v.30 no.1
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• pp.18-24
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• 2016

Stabilizer fins are installed on each side of a ship to control its roll motion. The most common stabilizer fin is a rolling control system that uses the lift force on the fin surface. If the angle of attack of a stabilizer fin is zero or the speed is zero, it cannot control the roll motion. The Coanda effect is well known to generate lift force in marine field. The performance of stabilizer fin that applies the Coanda effect has been verified by model tests and numerical simulations. It was found that a stabilizer fin that applied the Coanda effect at Cj = 0.085 and a zero angle of attack exactly coincided with that of the original fin at α = 26°. In addition, the power needed to generate the Coanda effect was not high compared to the motor power of the original stabilizer fin.

• Journal of Ocean Engineering and Technology
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• v.23 no.2
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• pp.87-91
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• 2009

The welding distortion of a hull structure in the shipbuilding industry is inevitable at each assembly stage. The geometric inaccuracy caused by welding distortion tends to preclude the introduction of automation and mechanization and requires additional man-hours for adjustment work during the following assembly stage. To overcome this problem, a distortion control method should be applied. For this purpose, it is necessary to develop an accurate prediction method that can explicitly account for the influence of various factors on the welding distortion. The validity of this prediction method must also be clarified through experiments. For the purpose of reducing the weld-induced bending deflection, this paper proposes the plastic counter-deforming method (PCDM), which uses line heating as the optimum distortion control method. The validity of this method was substantiated by a number of numerical simulations and actual measurements.

• Proceedings of the KSME Conference
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• 2008.11a
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• pp.1144-1149
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• 2008

Converting technology has developed to print information for the decades. Recently, this technology (like gravure, gravure-offset) is rising as an alternative way for mass production of printed electronics such as RFID, solar cell. For the width of printing line is under 10 microns, registration error should be minimized less than several microns. Tension disturbance is main cause of registration error and this should be minimized before the substrate is transported into printing zone. With PI controller, it is possible to suppress the disturbance within 2% of operating tension. But register error appears more than 10 micron using PIcontroller considering noise. So LQG controller is needed as an alternative control method. In this paper, the comparision of PI and LQG controller in the converting machine including measured noise and tension disturbance is presented. It is shown that the LQG controller is more suitable for precision tension control in printed electronics.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1581-1582
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• 2007

본 컨트롤러는 기존 고속인쇄기 인쇄 속도인 250 [mpm]의 두 배 속도인 500 [mpm]의 고속 인쇄에서도 사용할 수 있는 고성능 레지스터 컨트롤러를 개발해 오차 보정을 좀 더 정확하고 신속하게 하는 것에 그 목적이 있다. 즉, 고속 인쇄기에서 인쇄물의 인쇄오차 보상을 위한 고속 인쇄기용 레지스터 컨트롤러의 특성을 분석하고, 고성능 DSP를 이용하여 기존의 하드웨어에 의존하던 기능의 상당 부분을 소프트웨어로 처리함으로써 간단한 하드웨어 구조와 고성능 오차 보상 기능을 갖는 레지스터 컨트롤러를 개발하였다.