• 제목/요약/키워드: Reference generator

검색결과 310건 처리시간 0.024초

랜덤 스위칭 주기를 갖는 시그마 델타 변조기 (A Sigma-Delta Modulator With Random Switching Periods)

  • 배창한;김상민;이광원
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제50권10호
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    • pp.513-519
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    • 2001
  • This paper proposed a random sigma-delta modulator(RSDM), which is constructed by a 1st order sigma-delta modulator(SDM) and a simple structured random binary generator(RBG). The 1st order SDM produces a switching pulse waveform which has the same low-frequency component as the reference input, while the RBG spreads the distribution of the number of sampling per switching cycle, and thus disperses the spectrum spikes in the output. The relationship between the harmonic spectra and the number of sampling per switching cycle is studied through computer simulations, and the frequency spectra of the RSDM are confirmed in an experimental setup.

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SAD 연산의 가속을 위한 멀티미디어 코프로세서 구현 (Implemenation of an ASIP for acceleration SAD operation)

  • 조정현;정하영
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.809-810
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    • 2006
  • An H.264 algorithm is commonly used for video compression applications. This algorithm requires a large number of data computations, for example, the sum of absolute difference (SAD) operation. We analyzed H.264 reference encoding workloads. The H.264 encoding program has 8.78% SAD operation. The SAD operation is to sum up 16 difference-values in H.264 $4{\times}4$ sub-blocks. In order to accelerate SAD operations, we implemented an application specific instruction-set processor (ASIP) that can execute SAD and data transfer instructions. The proposed coprocessor has an absolute value generator and a carry save adder (CSA) unit to sum up 8 difference-values per one clock cycle. We completed SAD operation in 2 clock cycles. Experimental results show that the performance is improved by 34% of total execution time.

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A Differential Current-to-Time Interval Converter Using Current-Tunable Schmitt Triggers

  • Chung, Won-Sup
    • 전기전자학회논문지
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    • 제21권4호
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    • pp.375-380
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    • 2017
  • A differential current-to-time interval converter is presented for current mode sensors. It consists of a ramp voltage generator, a current mode sensor, a reference current source, two current-tunable Schmitt triggers, a one-shot multivibrator, and two logic gates. The design principle is to apply a ramp voltage to each input of the two current-tunable Schmitt triggers whose threshold voltages are proportional to the drain current values of the current mode sensors. A proposed circuit converts a current change in the ISFET biosensor into its equivalent pulse width change. A prototype circuit built using TSMC 0.18 nm CMOS process exhibit a conversion sensitivity amounting to $726.9{\mu}s/pH$ over pH variation range of 2-12 and a linearity error less than ${\pm}0.05%$.

가압경수로 원자력 발전소의 전범위 복제형 시뮬레이터 개발 (The Development of Full-Scope Replica Type Simulator for PWR Nuclear Power Plants)

  • 이중근
    • 한국시뮬레이션학회논문지
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    • 제6권1호
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    • pp.85-96
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    • 1997
  • Designing and constructing a proper simulator for real power plants requires extensive research in human engineering and computer science and integration of different fields of technologies such as system analysis, operational knowledge for nuclear plant, etc. A full scope replica type simulator for nuclear power plant is developed. The simulator has the same feature and operational functions as one in the main control room (MCR) of a reference power plant. The simulator provides the necessary training to recover or reduce damages from accidents that usually are unpredictable. This paper describes the configurations and characteristics for the simulator that is developed for Younggwang Nuclear Power Plant #3,4 which is the basic model of the Korean Nuclear Power Plant. The paper also describes technical aspects of Auto Code Generator that is used for developing the simulator. The successful development of the simulator will contribute to improve safety in operation of nuclear power plants.

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화력발전소의 과열기증기의 온도제어 (Temperature Control of Superheater Steam in Thermal Power Plant)

  • 신휘범;이순영
    • 전기학회논문지
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    • 제59권11호
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    • pp.2006-2011
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    • 2010
  • The superheater in the thermal power plant makes the wet steam into the dry steam with high temperature and high pressure by using the boiler heat. The dry steam pressure rotates the turbine-generator system. The efficiency and life time of the boiler heavily depends on the steam temperature regulation. The steam temperature can be deviated from the reference by the MW demand of the power plant. It is therefore required that the PI(proportional-integral) controller should be robust against the disturbance such as the MW demand. In this paper, the PI controller with the integral state predictor is proposed and applied to regulate the steam temperature of the superheater, and it is compared with the conventional PI controller operated in the thermal power plant in view of control performance.

지능형 속도 추정기를 이용한 유도전동기 속도 제어 (Speed Control of an Induction Motor using Intelligent Speed Estimator)

  • 김낙교;최성대
    • 대한전기학회논문지:시스템및제어부문D
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    • 제54권7호
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    • pp.437-442
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    • 2005
  • In order to realize the speed control of an induction motor, the information of the rotor speed is needed. So the speed sensor as an encoder or a pulse generator is used to obtain it. But the use of speed sensor occur the some problems in the control system of an induction motor. To solve the problems, the appropriate speed estimation algorithm is used instead of the speed sensor. Also there is the limitation to improve the speed control performance of an induction motor using the existing speed estimation algorithm. Therefore, in this paper, intelligent speed estimator using Fuzzy-Neural systems as adaptive laws in Model Reference Adaptive System is proposed so as to improve the existing estimation algorithm and ,using the rotor speed estimated by the Proposed estimator, the speed control of an induction motor without speed sensor is performed. The computer simulation and the experiment is executed to prove the performance of the speed control system usinu the proposed speed estimator.

Fault-Tolerant Strategy to Control a Reverse Matrix Converter for Open-Switch Faults in the Rectifier Stage

  • Lee, Eunsil;Lee, Kyo-Beum
    • Journal of Power Electronics
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    • 제16권1호
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    • pp.57-65
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    • 2016
  • Reverse matrix converters, which can step up voltages, are suitable for applications with source voltages that are lower than load voltages, such as generator systems. Reverse matrix converter topologies are advantageous because they do not require additional components to conventional matrix converters. In this paper, a detection method and a post-fault modulation strategy to operate a converter as close as possible to its desired normal operation under the open-switch fault condition in the rectifier stage are proposed. An open-switch fault in the rectifier stage of a reverse matrix converter causes current distortions and voltage ripples in the system. Therefore, fault-tolerant control for open-switch faults is required to improve the reliability of a system. The proposed strategy determines the appropriate switching stages from among the remaining healthy switches of the converter. This is done based on reference currents or voltages. The performance of the proposed strategy is experimentally verified.

전류 Stress 최소화 제어설계를 응용한 PFC Boost Pre-regulator (Current Stress Minimizing Control Scheme for Power Factor Correction (PFC) Boost Pre-regulator)

  • 이희철;김정은;박홍선;박기범;문건우
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2007년도 하계학술대회 논문집
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    • pp.353-355
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    • 2007
  • A simple technique for PFC circuit is presented using UC3854. This technique is about current peak controlling by a reference current generator. Decreased peak currents of the boost pre-regulator reduce circuit current stress and so rated currents of circuit elements are minimized. Simulation and experimental results will verify the viability of the new scheme.

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FPGA를 이용한 DSC-PLL 설계 및 실험 (DSC-PLL Design and Experiments Using a FPGA)

  • 조종민;서재학;차한주
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2014년도 전력전자학술대회 논문집
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    • pp.281-282
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    • 2014
  • 본 논문은 FPGA 기반의 DSC-PLL(Delayed Signal Cancellation - Phase Locked Loop)을 설계하고, 왜곡된 3상전압 조건에서 위상추종결과를 비교실험 하였다. FPGA 구현 알고리즘은 Matlab/Simulink와 연동된 System Generator를 이용하여 DSC-PLL 모델을 설계하고, Verilog HDL 코드로 변환 하였다. 불평형 및 고조파를 포함한 왜곡된 3상 전압 조건에서 FPGA에 구현된 DSC-PLL과 SRF-PLL (Synchronous Reference Frame - Phase Locked Loop)의 d-q축 고조파 감쇠특성 및 위상추종능력을 실험을 통해 비교하였다. DSC-PLL은 약 5.44ms 이내에 d-q축 고조파 성분을 제거함으로써 정상분 기본파 전압의 위상을 빠르게 추종하는 것을 검증하였다.

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한글과 로마자를 메타폰트로 생성하기 위한 UFO2xMF 시스템 (UFO2xMF system for generating Korean and Roman characters based on Metafont)

  • 노신현;최재영
    • 정보과학회 컴퓨팅의 실제 논문지
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    • 제24권2호
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    • pp.88-92
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    • 2018
  • 글자의 외곽선 정보가 포함된 UFO 파일을 Metafont로 변환하기 위해 'UFO2MF'와 '한글 메타폰트 생성기'가 연구되었다. 두 가지 연구사례는 외곽선 편집 방식을 이용하여 Metafont 코드로 구성된 폰트파일을 생성할 수 있지만, 'UFO2MF'는 외곽선 정보인 기준점과 조절점 중에 기준점만을 사용하므로 원만한 곡선을 표현할 수 없으며, '한글 메타폰트 생성기'는 글자의 곡선을 자유롭게 표현할 수 있지만 한글 글자만을 대상으로 변환하기 때문에 확장성이 부족하다. 본 논문에서는 한글과 로마자를 모두 외곽선 정보에서 Metafont 코드로 변환할 수 있는 UFO2xMF 시스템을 제안한다. UFO2xMF는 외곽선 정보를 Metafont 코드로 변환하는 과정에서 글자의 스타일을 변화시킬 수 있는 속성 값들을 적용할 수 있다. 또한 글자에 기준선과 무게중심선을 적용하여 한글과 로마자뿐만 아니라 다양한 언어의 글자들도 Metafont 코드로 변환할 수 있는 호환성 높은 시스템이다.