• Title/Summary/Keyword: Reference generator

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Adaptive Repetitive Control for an Eccentricity Compensation of Optical Disk Drive (광 디스크 드라이브의 편심 보상을 위한 적응 반복 제어)

  • Seo, Sam-Jun;Kim, Dong-Won;Park Gwi-Tae
    • Journal of the Korean Institute of Intelligent Systems
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    • v.15 no.2
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    • pp.135-142
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    • 2005
  • This paper presents an adaptive repetitive control scheme for optical disk drives to track a variable periodic reference signal. Periodic disturbances can be adequately attenuated using the concept of repetitive control, provided the period is known. Because optical disk drives support various speeds, they have the varying periodic disturbances. Based on repetitive control to change sampling frequency to follow the change of reference period, an adaptive repetitive control is proposed in order to deal with such disturbances. The proposed control consists of the repetitive controller and the frequency generator. The former uses a varying sampler operating at fixed multiple times of the disturbance frequency and the latter generates the changeable sampling frequency based on the disturbance frequency. The experimental results on the control of an optical disk drive demonstrate the effectiveness of the proposed schemes and the improvement of random access time as well.

EXPERIMENTS ON THE PERFORMANCE SENSITIVITY OF THE PASSIVE RESIDUAL HEAT REMOVAL SYSTEM OF AN ADVANCED INTEGRAL TYPE REACTOR

  • Park, Hyun-Sik;Choi, Ki-Yong;Choi, Seok;Yi, Sung-Jae;Park, Choon-Kyung;Chung, Moon-Ki
    • Nuclear Engineering and Technology
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    • v.41 no.1
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    • pp.53-62
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    • 2009
  • A set of experiments has been conducted on the performance sensitivity of the passive residual heat removal system (PRHRS) for an advanced integral type reactor, SMART, by using a high temperature and high pressure thermal-hydraulic test facility, the VISTA facility. In this paper the effects of the opening delay of the PRHRS bypass valves and the closing delay of the secondary system isolation valves, and the initial water level and the initial pressure of the compensating tank (CT) are investigated. During the reference test a stable flow occurs in a natural circulation loop that is composed of a steam generator secondary side, a secondary system, and a PRHRS; this is ascertained by a repetition test. When the PRHRS bypass valves are operated 10 seconds later than the secondary system isolation valves, the primary system is not properly cooled. When the secondary system isolation valves are operated 10 or 30 seconds later than the PRHRS bypass valves, the primary system is effectively cooled but the inventory of the PRHRS CT is drained earlier. As the initial water level of the CT is lowered to 16% of the full water level, the water is quickly drained and then nitrogen gas is introduced into the PRHRS, resulting in the deterioration of the PRHRS performance. When the initial pressure of the PRHRS is at 0.1MPa, the natural circulation is not performed properly. When the initial pressures of the PRHRS are 2.5 or 3.5 MPa, they show better performance than did the reference test.

The Implementation of Load Resistance Measurement System using Time-Frequency Domain Reflectometry (시간-주파수 영역 반사파 계측방법을 이용한 부하 저항 측정 시스템 구현)

  • Kwak, Ki-Seok;Park, Tae-Geun;Yoon, Tae-Sung;Park, Jin-Bae
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.55 no.10
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    • pp.435-442
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    • 2006
  • One of the most important topics about the safety of electrical and electronic system is the reliability of the wiring system. The Time-Frequency Domain Reflectometry(TFDR) is a state-of-the-art system for detecting and estimating of the fault on a wiring. In this paper, We've considered the load resistance measurement on a coaxial cable using TFDR in a way of expanded application. The TFDR system was built using commercial Pci extensions for Instrumentation(PXI) and LabVIEW. The proposed real time TFDR system consisted of the reference signal design, signal generation, signal acquisition, algorithm execution and results display part. To implement real time system, all of the parts were programmed by the LabVIEW which is one of the graphical programming languages. Using the application software implemented by the LabVIEW, we were able to design a proper reference signal which is suitable for target cable and control not only the arbitrary waveform generator in the signal generation part but alto the digital storage oscilloscope in the signal acquisition part. By using the TFDR real time system with the terminal resistor on the target cable, we carried out load impedance measurement experiments. The experimental results showed that the proposed system are able not only to detect the location of impedance discontinuity on the cable but also to estimate the load resistance with high accuracy.

Design of digital clock level translator with 50% duty ratio from small sinusoidal input (작은 정현파입력의 50% Duty Ratio 디지털 클럭레벨 변환기 설계)

  • Park, Mun-Yang;Lee, Jong-Ryul;Kim, Ook;Song, Won-Chul;Kim, Kyung-Soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.8
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    • pp.2064-2071
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    • 1998
  • A new digital clock level translator has been designed in order to produce a clock source of the internal logic circuits. The translator output has 50% duty ratio from small sinusoidal input such as TCXO which oscillates itself in poratable components. The circuit consists of positive and negative comparators, RS latch, charge pump, and reference vol- tage generator. It detects pulse width of the output waveform and feedbacks the control signal to the input com-parator. It detects pulse width of the output waveform and feedbacks the control signal to the input com-parator reference, producing output waveform with valid 50% duty ratio of the digital signal level. The designed level translator can be used as a sampling clock source of ADC, PLL and the colck source of the clock synthesizer. The circuit wasdesigned in a 0.8.mu.m analog CMOS technology with double metal, double poly, and BSIM3 circuit simulation model. From our experimental results, a stable operating characteristics of 50 +3% duty ratio was obtained from the sinusoidal input wave of 370 mV.

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Design of a Wireless Self-Powered Temperature Sensor for UHF Sensor Tags (무선 전력 구동 센서 태그 내장형 온도센서의 설계)

  • Kim, Hyun-Sik;Cho, Jung-Hyun;Kim, Shi-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.10
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    • pp.1-6
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    • 2007
  • Wireless Self-Powered Temperature Sensor for UHF Sensor Tags which are basic device for construction of ubiquitous sensor network is proposed. The key parameters of the target specification are resolution of $0.1\;^{\circ}C$ per output bit, below 1.5 V of operating voltage and below 5 uW of power consumption during sensing operation. Temperature sensor circuit consists of PTAT current generator, band gap reference circuit generating both reference voltage and current, Sigma-Delta Converter, and Digital Counter. Simulated maximum resolution was $0.23\;^{\circ}C/bit$ in 11-bit output. The proposed temperature sensor was fabricated by using a 0.25 m CMOS process. The chip area is $0.32\;{\times}\;0.22\;mm$ and the operating frequency is 2 MHz. Measured resolution from fabricated temperature sensor was $4\;^{\circ}C/bit$ in 8-bit output for the temperature range from $10^{\circ}C$ to $80^{\circ}C$.

Dynamic-Response-Free SMPS Using a New High-Resolution DPWM Generator Based on Switched-Capacitor Delay Technique (Switched-Capacitor 지연 기법의 새로운 고해상도 DPWM 발생기를 이용한 Dynamic-Response-Free SMPS)

  • Lim, Ji-Hoon;Park, Young-Kyun;Wee, Jae-Kyung;Song, In-Chae
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.1
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    • pp.15-24
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    • 2012
  • In this paper, we suggest the dynamic-response-free SMPS using a new high-resolution DPWM generator based on switched-capacitor delay technique. In the proposed system, duty ratio of DPWM is controlled by voltage slope of an internal capacitor using switched-capacitor delay technique. In the proposed circuit, it is possible to track output voltage by controlling current of the internal capacitor of the DPWM generator through comparison between the feedback voltage and the reference voltage. Therefore the proposed circuit is not restricted by the dynamic-response characteristic which is a problem in the existing SMPS using the closed-loop control method. In addition, it has great advantage that ringing phenomenon due to overshoot/undershoot does not appear on output voltage. The proposed circuit can operate at switching frequencies of 1MHz~10MHz using internal operating frequency of 100 MHz. The maximum current of the core circuit is 2.7 mA and the total current of the entire circuit including output buffer is 15 mA at the switching frequency of 10 MHz. The proposed circuit has DPWM duty ratio resolution of 0.125 %. It can accommodate load current up to 1 A. The maximum ripple of output voltage is 8 mV. To verify operation of the proposed circuit, we carried out simulation with Dongbu Hitek BCD $0.35{\mu}m$ technology parameter.

Characteristic Changes of ZnO Arrester Blocks by Multiple-lightning Impuse Currents (다중 뇌충격전류에 의한 산화아연형 피뢰기 소자의 특성 변화)

  • Gil, Gyeong-Seok;Han, Ju-Seop
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.12
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    • pp.685-690
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    • 2000
  • Multiple-lightning impulse currents are a general feature of the lightning ground f=flash. It is therefore necessary for lightning arresters used in power systems to be estimated by applying not only a single-lightning impulse current but also a multiple-lightning impulse currents. This paper presents the effects of multiple-lightning impulse currents on deterioration of ZnO arrester blocks. The multiple-lightning impulse generator which can produce quadruple 8/20$[\mus]$ 5[kA] with separation time of 30~120[ms] is designed and fabricated. The total energy applied to the arrester block at each impulse is about 1,200[J]. In experiment, various parameters such as leakage current component, reference voltage, and temperature are measured with the number of applied impulse current. Also, micro-structure changes of the ZnO blocks after applying the single and the multiple-lightning impulse currents of 200 times are compared. The experimental results indicate that the types of arrester blocks are more vulnerable to deterioration or damage by multiple-lightning impulse currents.

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A Low-power, Low-noise DLL-based Frequency Multiplier for Reference Clock Generator (기준 클럭 발생을 위한 저 젼력, 저 잡음 DLL기반 주파수 체배기)

  • Kim, Hyung Pil;Hwang, In Chul
    • Journal of Korea Society of Industrial Information Systems
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    • v.18 no.5
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    • pp.9-14
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    • 2013
  • This paper is designed frequency multiplier with low phase noise using DLL technique. The VCDL is designed using a differential structure to reduce common-mode noise. The proposed frequency multiplier is fabricated in a 65nm, 1.2V TSMC CMOS process, and the operating frequency range from 10MHz to 24MHz was measured. The SSB phase noise is measured to be -125dBc/Hz at 1MHz from 38.4MHz carrier. A total area of $0.032mm^2$were consumed in the chip, including the output buffer. Total current is 1.8mA at 1.2V supply voltage.

Design Optimization of Liquid Rocket Engine Using Genetic Algorithms (유전알고리즘을 이용한 액체로켓엔진 설계 최적화)

  • Lee, Sang-Bok;Lim, Tae-Kyu;Roh, Tae-Seong
    • Journal of the Korean Society of Propulsion Engineers
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    • v.16 no.2
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    • pp.25-33
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    • 2012
  • A genetic algorithm (GA) has been employed to optimize the major design variables of the liquid rocket engine. Pressure of the main combustion chamber, nozzle expansion ratio and O/F ratio have been selected as design variables. The target engine has the open gas generator cycle using the LO2/RP-1 propellant. The gas properties of the combustion chamber have been obtained from CEA2 and the mass has been estimated using reference data. The objective function has been set as multi-objective function with the specific impulse and thrust to weight ratio using the weight method. The result shows about 4% improvement of the specific impulse and 23% increase of the thrust to weight ratio. The Pareto frontier line has been also obtained for various thrust requirements.

Basic Study on Development of Ultra-high Strength Grout for Offshore Wind Turbines (해상풍력 발전기용 초고강도 그라우트 개발을 위한 기초적 연구)

  • Lim, Myung-Kwan;Ha, Sang-Su
    • KIEAE Journal
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    • v.15 no.1
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    • pp.155-160
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    • 2015
  • The annual average of energy sources is continuously increasing at a rate of 5.8%, and particularly, the power generation proportion of new/renewable energy is increasing significantly. Furthermore, South Korea has established a national energy master plan for 2008-2030 and is aiming at obtaining approximately 11% of total energy production from the wind turbine sector. Although offshore wind turbines are similar to wind turbines installed on land, they require materials with excellent dynamic properties and durability to prevent damage due to seawater at the lower parts and connecting parts. The lower parts of wind turbines are submerged in seawater, and the upper and lower parts are connected by filling the connecting part with grout. This paper describes the test results of the process of determining the mix ratios to develop ultra-high grout for offshore wind turbines. There is virtually no relevant technology regarding grout for offshore wind turbines in South Korea that can be referenced for the process of determining the mix ratios. Therefore, tests were conducted for determining compression strength, elastic modulus, flexural strength, density, constructability (floor test), and early strength by referencing a high-performance grout produced in South Korea, and the mixing process for achieving the goal strengths was described using the Korean Industrial Standards (KS) as the reference.