• Proceedings of the KIPE Conference
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• 2011.11a
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• pp.271-272
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• 2011

본 논문은 SOGI를 이용한 정상분 전압 검출을 기반으로 하는 SRF(synchronous reference frame)-PLL(phase locked loop) 시스템을 제안한다. 일반화된 2차 적분기의 이중으로 사용하여 QSG(Quadrature-signals generator)의 성능을 개선하여 전압 불평형, 고조파 왜곡 등으로 인한 오차 발생 시에도 빠르고 정확한 위상 검출이 가능하도록 하였으며 본 논문에서 제시한 알고리즘은 PSIM 프로그램 결과를 통하여 타당성을 입증한다.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.669-671
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• 2004

This paper presents a MIMO nonlinear controller for the power system consisting of a turbine and a synchronous generator connected to an infinite bus. The controller proposed is based on feedback input-output linearization; its main goal is to regulate the terminal voltage and frequency, and is to improve the transient stability under large disturbances and unexpected faults. It is guaranteed that the voltage converges to its reference value exponentially, and that the frequency and the mechanical/electrical power are bounded. The design procedure is tested on a single machine infinite bus power system through simulations, and is seen to be effective.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.55 no.1
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• pp.21-25
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• 2006

This paper describes the novel control techniques design of VSC(Voltage Sag Corrector) for the purpose of power line quality enhancement. A fast detecting technique of voltage sag is implemented through the detection of instantaneous value on synchronous rotating do-reference frame. The first order digital filter is added in the detection algorithm to protect the insensitive characteristics against the noise. The relationship between the total detection time and cut-off frequency of the filter is described. The size of the capacitor bank used as the energy storage element is designed from the point of view of input/output energy with circuit analysis. Finally, the validity of the proposed scheme is proven through the simulated results.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.707-710
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• 1998

This paper presents a new voltage down converter(VDC) for low power, high speed DRAM. This VDC Consists of RVG(Reference Voltage Generator) and Driver Circuit. And it is independent of temperature variation, and Supply Voltage. Using weak inversion region, this RVG dissipates low power. Internal Voltage Source of this VDC is stable in spite of high speed operation of memory array. This circuit is designed with a $0.65\mu\textrm{m}$ nwell CMOS technology. In HSPICE simulation results, Temperature dependency of this RVG is $20\muV/^{\circ}C,$ supply voltage dependency is $\pm0.17%,$ $VCC=3.3V\pm0.3V,$ and current dissipation is $5.22\muA.$ Internal voltage source bouncing of this VDC is smaller than conventional VDC.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.6
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• pp.1123-1129
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• 2009

The main goal of this paper is to simulate a Doubly-Fed Induction Generator (DFIG), which is similar to a real system. Wind velocity data is applied to a 2D Lookup table as a speed reference for a turbine model. A real electric machine's parameters are put in the simulator to get some results of the real system. The Matlab have been generally used to simulate DFIG, but it has some differences from the real system and is difficult to implement. A Simplorer simulator, however, simplifies DFIG simulation. The turbine is directly connected with the DFIG to be close to the real system. The machine's rotor is excited and controlled by the discrete carrier modulated matrix converter. It is possible to retrieve important information, like a generated power and wind quality etc., from the simulator without a huge wind turbine.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.11
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• pp.69-75
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• 2013

This paper proposes a new algorithm for the optimal placement of a step voltage regulator(SVR) in distribution system with Distributed Generators(DG) using a Particle Swarm Optimization(PSO). The objective function of this algorithm is to find optimal placement for minimum loss while maintaining each node voltage fluctuations within upper and lower limits. In the objective function of proposed algorithm, the deviations to reference voltage and the distribution loss are considered. To verify effectiveness of the proposed method, simulation is implemented using MATLAB.

• Proceedings of the KIEE Conference
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• 2005.07a
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• pp.319-322
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• 2005

This paper describes practical tuning methods and testing of a digital PSS, which uses both frequency and power, with the 220MVA Chungpyung P/P #1 in the KEPCO system to enhance the damping of local modes. In the first step, the objective phase of PSS is computed through a phase leading function to provide compensation between the exciter reference point and the generator air-gap torque before tuning the PSS's time constants. In addition, eigenvalue analysis was used to determine a range of PSS's gain, whichis the more useful for field testing rather than a single gain value. The Real-Time Digital Simulator was used to verify safe operations of the PSS in the presence of disturbances, such as AVR step and three phase fault.

• Proceedings of the KIEE Conference
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• 1998.11c
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• pp.907-909
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• 1998

This paper describes the effect of impulse current on degradation of ZnO blocks. In this study, an impulse current generator which can produce 8/20 [${\mu}s$], 3 [kA] and 4/10 [${\mu}s$], 5 [kA] waveform is designed and fabricated to simulate the lightning impulse current. The residual voltage, reference voltage, and leakage current flowing to the ZnO blocks are observed. The experimental results show that the leakage current increases continuously with the number of applied impulse current, but no significant changes in residual voltage and in operating voltage are observed until the ZnO block is destroyed. Also, it is confirmed that the main factor on degradation of ZnO blocks is rather the total energy applied to ZnO blocks than the peak value of the impulse current.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.542-545
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• 1998

This paper presents a new reference voltage generator(RVG) for advanced DRAM's. The proposed RVG with three temperature coefficient is independent of temperature variation, and supply voltage. This is used to shorten leakage current using the boosted sense ground(BSG). This circuit is designed in a 0.8.mu.m nwell CMOS, double-polysilicon, double-metal technology. The simulation resutls in jindependent temperature and supply voltage. In hspice simulation results, temperature dependency of RVG is 130.mu.V/.deg. C and supply voltage dependency is .+-.0.91%, $V_{cc}$ =3.3V.+-. 0.5V.3.3V.+-. 0.5V.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.593-594
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• 2008

In this article, process voltage temperature (PVT) compensated on-chip oscillator is implemented by using proportional to absolute temperature (PTAT) circuit and process compensator. Process compensator circuit based on current subtracter and PTAT circuit are proposed for compensation of oscillation frequency to cope with process variation and temperature variation. All circuit can operate in the range of $3.5{\sim}5\;V$ supply voltage. It can be applied to PVT insensitive low frequency clock reference generator.