• Journal of KSNVE
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• v.8 no.6
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• pp.1181-1192
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• 1998

This paper describes the performance of a full-authority neural network-based fault tolerant system within a flight control system. This fault tolerant flight control system integrates sensor and actuator failure detection, identification, and accommodation (SFDIA and AFDIA), The first task is achieved by incorporating a main neural network (MNN) and a set of n decentralized neural networks (DNNs) to create a system for achieving fault tolerant capabilities for a system with n sensors assumed to be without physical redundancy The second scheme implements the same main neural network integrated with three neural network controllers (NNCs). The function of NNCs is to regain equilibrium and to compensate for the pitching, rolling. and yawing moments induced by the failure. Particular emphasis is placed in this study toward achieving an efficient integration between SFDIA and AFDIA without degradation of performance in terms of false alarm rates and incorrect failure identification. The results of the simulation with different actuator and sensor failures are presented and discussed.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.6
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• pp.575-583
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• 2003

In thesis we applied the short or open reflection type for IQ vector modulator The open or short type is operated even exception of other redundancy circuit. Generally IQ vector modulator uses MESFET in performing reflection open or short, then minus voltage which is having complex structure is required to operate MESFET via IQ signal. However BJT can be substituted for MESFET, BJT is improved characteristics like as cutoff frequency, electron mobility and so on. We used BJT in IQ vector modulator which is compatible with TTL level in I,Q digital signal, and attached AGC function. We got the result of operations within ${\pm}$ 1$^{\circ}$ phase and ${\pm}$ 0.6 dB amplitude Variation With full range of 20 dB and Variation of ${\pm}$ 6$^{\circ}$ Phase and ${\pm}$ 0.5 dB amplitude Versus full temperature range.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.18 no.5
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• pp.174-182
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• 2004

Consideration for parallel operation in a high power system has been increased due to the advantages of parallel operation like as high productivity, simplicity of design, and redundancy of power. Based on the small signal model of DC-DC Converter, the simple and exact power stage model of parallel operation system is derived and the parallel operation system using current balance method for the uniform current distribution among the parallel operation system is proposed. Using Simulation programs, which consists of nonidentical Converter modules and changes the position of master and slave automatically, the current distribution error is kept within the limit in the parallel operation system. To verify the high performance of the proposed Converter system for parallel operation, the parallel operation test, which has 2 Converter modules of 1 kW, is accomplished. Also, the simulation result is good agreement with the experiment result in the transient and starting characteristics.

• Structural Engineering and Mechanics
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• v.74 no.6
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• pp.821-832
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• 2020

The fundamental period is an important parameter for seismic design and seismic risk assessment of building structures. In this paper, a simplified theoretical method to predict the fundamental period of masonry infilled reinforced concrete (RC) frame is developed based on the basic theory of engineering mechanics. The different configurations of the RC frame as well as masonry walls were taken into account in the developed method. The fundamental period of the infilled structure is calculated according to the integration of the lateral stiffness of the RC frame and masonry walls along the height. A correction coefficient is considered to control the error for the period estimation, and it is determined according to the multiple linear regression analysis. The corrected formula is verified by shaking table tests on two masonry infilled RC frame models, and the errors between the estimated and test period are 2.3% and 23.2%. Finally, a probability-based method is proposed for the corrected formula, and it allows the structural engineers to select an appropriate fundamental period with a certain safety redundancy. The proposed method can be quickly and flexibly used for prediction, and it can be hand-calculated and easily understood. Thus it would be a good choice in determining the fundamental period of RC frames infilled with masonry wall structures in engineering practice instead of the existing methods.

• Proceedings of the KIPE Conference
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• 2004.07a
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• pp.355-358
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• 2004

Currently, to overcome the limit of a 14V power supply system and to enhance the stability of this system high and to make the fuel efficiency better, a research development of a 42V power supply system is actively the progress. As an intermediate step to change into an unity power supply system, a 42V/14V dual power supply system uses a DC/DC Converter as one of structure elements. Considering the main electric power sources in the next generation of the car is a 42V system a 14V power supply system has advantages as follows : In be managed efficiently and to increase the redundancy at start, to jump start with any vehicles, etc. We need the introduction of a hi-directional converter that can flow the energy each other in a dual 42V-l2V system. This paper proposed the ZVS hi-directional CUK DC/DC converter which decrease the weight with the size of the DC/DC Converter and minimize the loss when the switching happen. In this paper, a circuit design method and an action principle of the circuit was proposed. To verify the proposed circuit, a comprehensive evaluation with theoretical analysis, simulation results is presented.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.5A
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• pp.517-525
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• 2006

In this paper, we present a high-speed RFID data filtering engine designed to carry out filtering under the conditions of massive data and massive filters. We discovered that the high-speed RFID data filtering technique is very similar to the high-speed packet classification technique which is used in high-speed routers and firewall systems. Actually, our filtering engine is designed based on existing packet classification algorithms, Bit Parallelism and Aggregated Bit Vector(ABV). In addition, we also discovered that there are strong temporal relations and redundancy in the RFID data filtering operations. We incorporated two kinds of caches, tag and filter caches, to make use of this characteristic to improve the efficiency of the filtering engine. The performance of the proposed engine has been examined by implementing a prototype system and testing it. Compared to the basic sequential filter comparison approach, our engine shows much better performance, and it gets better as the number of filters increases.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.4
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• pp.984-995
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• 1996

Data errors according to the various noises caused in the satellite communication links are corrected by the Viterbi decoding algorithm which has extreme error correcting capability. In this paper, we designed and implemented a convolutional encoder and Viterbi decoder ASIC which is used to encode the input data at the transmit side and correct the errors of the received data at the receive side for use in the VSAT communication system. And this chip may be used in any BPSK, QPSK, or OQPSK transmission system. The ambiguity resolver corrects PSK modem ambiguities by delaying, interting, and/or exchanging code symbol to restore their original sequence and polarity. In case of previous decoding system, ambiguity state(AS) of data is resolved by external control logic and extra redundancy data are needed to resolve AS. But, by adopting decoder proposed in this paper, As of data is resolved automatically by internal logic of decoder in case of continuous mode, and by external As line withoug extra redudancy data in burst mode case. So, decoding parts are simple in continuous mode and transmission efficiency is increased in bust mode. The features of this chip are full duplex operation with independent transmit and receive control and clocks, start/stop inputs for use in burst mode systems, loopback function to verify encoder and decoder, and internal or external control to resolve ambinguity state. For verification of the function and performance of a fabricated ASIC chip, we equiped this chip in the Central and Remote Earth Station of VSAT system, and did the performance test using the commerical INTELSAT VII under the real satellite link environmens. The results of test were demonstrated the superiority of performance.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.4
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• pp.774-780
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• 2017

This paper proposes an efficient binary arithmetic encoder hardware architecture for CABAC encoding, which is an entropy coding method of HEVC. CABAC is an entropy coding method that is used in HEVC standard. Entropy coding removes statistical redundancy and supports a high compression ratio of images. However, the binary arithmetic encoder causes a delay in real time processing and parallel processing is difficult because of the high dependency between data. The operation of the proposed CABAC BAE hardware structure is to separate the renormalization and process the conventional iterative algorithm in parallel. The new scheme was designed as a four-stage pipeline structure that can reduce critical path optimally. The proposed CABAC BAE hardware architecture was designed with Verilog HDL and implemented in 65nm technology. Its gate count is 8.07K and maximum operating speed of 769MHz. It processes the four bin per clock cycle. Maximum processing speed increased by 26% from existing hardware architectures.

• Proceedings of KOSOMES biannual meeting
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• 2004.11a
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• pp.137-141
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• 2004

Ship structures are basically an assembly of plate elements and the load-carrying capacity or the ultimate strength is one of the most important criteria for safety assessment and economic design. Also, Structural elements making up ship plated structures do not work separately, resulting in high degree of redundancy and complexity, in contrast to those of steel framed structures. To enable the behavior of such structures to be analyzed, simplifications or idealizations must essentially be made considering the accuracy needed and the degree of complexity of the analysis to be used. On this study, to investigate effect of modeling range, the finite element method are used and their results are compared varying the analysis ranges. The model has been selected from bottom panels of large merchant ship structures. For FEA, three types of structural modeling are adopted in terms of the extent of the analysis. The purpose of the present study is to numerically calculate the characteristics of ultimate strength behavior according to the analysis ranges of stiffened panels subject to uniaxial compressive loads.

• Proceedings of the KSPS conference
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• 1996.10a
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• pp.472-472
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• 1996

The material of database for speech recognition should include phonetic phenomena as much as possible. At the same time, such material should be phonetically compact with low redundancy[1, 2]. The phonetic phenomena in continuous speech is the key problem in speech recognition. This paper describes the processing of a set of sentences collected from the database of 1993 and 1994 "People's Daily"(Chinese newspaper) which consist of news, politics, economics, arts, sports etc.. In those sentences, both phonetic phenometla and sentence patterns are included. In continuous speech, phonemes always appear in the form of allophones which result in the co-articulary effects. The task of designing a speech database should be concerned with both intra-syllabic and inter-syllabic allophone structures. In our experiments, there are 404 syllables, 415 inter-syllabic diphones, 3050 merged inter-syllabic triphones and 2161 merged final-initial structures in read speech. Statistics on the database from "People's Daily" gives and evaluation to all of the possible phonetic structures. In this sentence set, we first consider the phonetic balances among syllables, inter-syllabic diphones, inter-syllabic triphones and semi-syllables with their junctures. The syllabic balances ensure the intra-syllabic phenomena such as phonemes, initial/final and consonant/vowel. the rest describes the inter-syllabic jucture. The 1560 sentences consist of 96% syllables without tones(the absent syllables are only used in spoken language), 100% inter-syllabic diphones, 67% inter-syllabic triphones(87% of which appears in Peoples' Daily). There are rougWy 17 kinds of sentence patterns which appear in our sentence set. By taking the transitions between syllables into account, the Chinese speech recognition systems have gotten significantly high recognition rates[3, 4]. The following figure shows the process of collecting sentences. [people's Daily Database] -> [segmentation of sentences] -> [segmentation of word group] -> [translate the text in to Pin Yin] -> [statistic phonetic phenomena & select useful paragraph] -> [modify the selected sentences by hand] -> [phonetic compact sentence set]