• Clean Technology
• /
• v.28 no.3
• /
• pp.203-209
• /
• 2022

An environmental evaluation was conducted by employing LCA methodology for a mechanical seal manufacturing process that uses recycled silicon recovered from end-of-cycle PV modules. The recycled silicon was purified and reacted with carbon to synthesize β-SiC particles. Then the particles underwent compression molding, calcination and heat treatment to produce a product. Field data were collected and the potential environmental impacts of each stage were calculated using the LCI DB of the Ministry of Environment. The assessment was based on 6 categories, which were abiotic resource depletion, acidification, eutrophication, global warming, ozone depletion and photochemical oxidant creation. The environmental impacts by category were 45 kg CO₂ for global warming and 2.23 kg C₂H₄ for photochemical oxide creation, and the overall environmental impact by photochemical oxide creation, resource depletion and global warming had a high contribution of 98.7% based on weighted analysis. The wet process of fine grinding and mixing the raw silicon and carbon, and SiC granulation were major factors that caused the environmental impacts. These impacts need to be reduced by converting to a dry process and using a system to recover and reuse the solvent emitted to the atmosphere. It was analyzed that the environmental impacts of resource depletion and global warming decreased by 53.9% and 60.7%, respectively, by recycling silicon from end-of-cycle PV modules. Weighted analysis showed that the overall environmental impact decreased by 27%, and the LCA analysis confirmed that recycling waste modules could be a major means of resource saving and realizing carbon neutrality.

• Journal of the Korean Institute of Telematics and Electronics D
• /
• v.34D no.2
• /
• pp.38-45
• /
• 1997

In this paper, the three-dimensional stress effect of thermal oxide is simulated. We developed a three-dimensional finite element numerical simulator including three-dimensional adaptive mesh generator that is able to refine and eliminate nearby moving boundary of oxide, and oxidation solver with stress model. To investigate the behavior of thermal oxidation the simulations of thermal oxidation for island and hole structures are carried out assuming silicon wafer of <100> direction, temperature of $1000^{\circ}C$, oxidation time of 60min, wet ambient, initial oxide thickness of $300\AA$, and nitride thickness of $2, 000\AA$. The main effect of deformation at the corner area of oxide is due to distribution of oxidant, but the deformation of oxide is affected by the stressin theoxide. In the island structure which is the structure mostly covered with nitride and a coner is opended to oxidation, oxidation is reduced at the coner by compressive stress. In the hole structure which is the structure mostly opedned to oxide and a coner is convered with nitride, however, oxidation is increased at the coner by tensile stress.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.36 no.2
• /
• pp.129-135
• /
• 2023

An analytical threshold voltage model is presented to observe the change in threshold voltage shift ΔV_th of a junctionless double gate MOSFET using ferroelectric-metal-SiO₂ as a gate oxide film. The negative capacitance transistors using ferroelectric have the characteristics of increasing on-current and lowering off-current. The change in the threshold voltage of the transistor affects the power dissipation. Therefore, the change in the threshold voltage as a function of theferroelectric thickness is analyzed. The presented threshold voltage model is in a good agreement with the results of TCAD. As a results of our analysis using this analytical threshold voltage model, the change in the threshold voltage with respect to the change in the ferroelectric thickness showed that the threshold voltage increased with the increase of the absolute value of charges in the employed ferroelectric. This suggests that it is possible to obtain an optimum ferroelectric thickness at which the threshold voltage shift becomes 0 V by the voltage across the ferroelectric even when the channel length is reduced. It was also found that the ferroelectric thickness increased as the silicon thickness increased when the channel length was less than 30 nm, but the ferroelectric thickness decreased as the silicon thickness increased when the channel length was 30 nm or more in order to satisfy ΔV_th=0.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.02a
• /
• pp.71-71
• /
• 2012

As the critical dimensions of integrated circuits are scaled down, the line width and spacing between the metal interconnects are made smaller. The dielectric film used as insulation between the metal lines contributes to the resistance-capacitance (RC) time constant that governs the device speed. If the RC time delay, cross talk and lowering the power dissipation are to be reduced, the intermetal dielectric (IMD) films should have a low dielectric constant. The introduction of Cu and low-k dielectrics has incrementally improved the situation as compared to the conventional $Al/SiO_2$ technology by reducing both the resistivity and the capacitance between interconnects. Some of the potential candidate materials to be used as an ILD are organic and inorganic precursors such as hydrogensilsequioxane (HSQ), silsesquioxane (SSQ), methylsilsisequioxane (MSQ) and carbon doped silicon oxide (SiOCH), It has been shown that organic functional groups can dramatically decrease dielectric constant by increasing the free volume of films. Recently, various inorganic precursors have been used to prepare the SiOCH films. The k value of the material depends on the number of $CH_3$ groups built into the structure since they lower both polarity and density of the material by steric hindrance, which the replacement of Si-O bonds with Si-$CH_3$ (methyl group) bonds causes bulk porosity due to the formation of nano-sized voids within the silicon oxide matrix. In this talk, we will be introduce some properties of SiOC(-H) thin films deposited with the dimethyldimethoxysilane (DMDMS: $C_4H_{12}O_2Si$) and oxygen as precursors by using plasma-enhanced chemical vapor deposition with and without ultraviolet (UV) irradiation.

• Transactions on Electrical and Electronic Materials
• /
• v.18 no.4
• /
• pp.199-202
• /
• 2017

Silicon carbide (SiC) is being spotlighted as a next-generation power semiconductor material owing to the characteristic limitations of the existing silicon materials. SiC has a wider band gap, higher breakdown voltage, higher thermal conductivity, and higher saturation electron mobility than those of Si. When using this material to implement Schottky barrier diode (SBD) devices, SBD-state operation loss and switching loss can be greatly reduced as compared to that of traditional Si. However, actual SiC SBDs exhibit a lower dielectric breakdown voltage than the theoretical breakdown voltage that causes the electric field concentration, a phenomenon that occurs on the edge of the contact surface as in conventional power semiconductor devices. Therefore in order to obtain a high breakdown voltage, it is necessary to distribute the electric field concentration using the edge termination structure. In this paper, we designed an edge termination structure using a field plate structure through oxide etch angle control, and optimized the structure to obtain a high breakdown voltage. We designed the edge termination structure for a 650 V breakdown voltage using Sentaurus Workbench provided by IDEC. We conducted field plate experiments. under the following conditions: $15^{\circ}$, $30^{\circ}$, $45^{\circ}$, $60^{\circ}$, and $75^{\circ}$. The experimental results indicated that the oxide etch angle was $45^{\circ}$ when the breakdown voltage characteristics of the SiC SBD were optimized and a breakdown voltage of 681 V was obtained.

• 한국연소학회:학술대회논문집
• /
• 2005.10a
• /
• pp.328-336
• /
• 2005

Effects of surface defect distribution on flame instability during flame-surface interaction are experimentally investigated. To examine the chemical quenching phenomenon, we prepared thermally grown silicon oxide plates with well-defined defect density. Ion implantation was used to control the number of defects, i.e. oxygen vacancies. In an attempt to preferentially remove the oxygen atoms from silicon dioxide surface, argon ions with low energy level from 3keV to 5keV were irradiated at the incident angle of $60^{\circ}C$. Compositional and structural modification of $SiO_2$ induced by low-energy $Ar^+$ ion irradiation has been characterized by Atomic Force Microscopy (AFM) and X-ray Photoelectron Spectroscopy (XPS). The analysis shows that as the ion energy increases, the number of structural defect also increases and non-stoichiometric condition of $SiO_x(x{\le}2)$ plates is enhanced. From the quenching distance measurements, we found out that when the surface temperature is under $300^{\circ}C$, the quenching distance decreases on account of reduced heat loss; as the surface temperature increases over $300^{\circ}C$, however, quenching distance increases despite reduced heat loss effect. Such aberrant behavior is caused by heterogeneous chemical reaction between active radicals and surface defect sites. The higher defect density, the larger quenching distance. This results means that chemical quenching is governed by radical adsorption and can be parameterized by the oxygen vacancy density on the surface.

• International Journal of Precision Engineering and Manufacturing-Green Technology
• /
• v.9
• /
• pp.431-441
• /
• 2021

Gadolinium-doped ceria (GDC) is sought-after as an electrolyte layer in solid oxide fuel cells because of its high ionic conductivity and low treatment temperature. Recently, some studies have been reported to produce a component layer of solid oxide fuel cell using a Roll-to-Roll (R2R) system because of its characteristics of the cost-effective and eco-friendly advantages. However, the brittleness and low density of GDC prevent it from being mass-produced via the R2R continuous process. Therefore, we attempted to improve the density of GDC-based multi-electrolyte layers through an optimized R2R calendaring process. The finite element method was employed to determine suitable materials for the calendering rolls and the maximum calendering pressure that would reduce the thickness and porosity of the coated electrolyte layer without producing cracks in the layer. The effect of the number of calendering processes on the thickness and porosity of the electrolyte layers was examined as well. Silicon and steel were observed to be best-suited as the materials for the top and bottom rolls, respectively. Moreover, the maximum permissible calendering pressure was determined to be 15 MPa, while the ideal number of calendering processes was found to be 5. Experimental observations using scanning electron microscopy confirmed that the optimized calendering process reduced the thickness and porosity of the coated electrolyte layers by 16.99% and 7.04%, respectively. Thus, our findings suggest that large-area, high-density GDC-based multi-electrolyte layers with smooth surfaces can be produced via the R2R process, which can enable mass production of SOFCs.

• Journal of the Korean Crystal Growth and Crystal Technology
• /
• v.17 no.4
• /
• pp.160-164
• /
• 2007

Carbon nanofibers were deposited on silicon oxide substrate by thermal chemical vapor deposition method. For the enhancement of the characteristics of carbon nanofibers, the source gases ($C_2H_2,\;H_2$) flows were intentionally manipulated as the cyclic on/off modulation of $C_2H_2$ flow. By the cyclic modulation process during the initial deposition stage, the formation density of carbon nanofibers on the substrate could be much more enhanced. The diameter of as-grown carbon nanofibers was also reduced by the cyclic modulation process. The cause for the variation in the characteristics of carbon nanofibers by the cyclic modulation process was discussed in association with the hydrogen gas etching ability.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.30A no.8
• /
• pp.34-41
• /
• 1993

Effect of high temperature annealing conditions on Ta$_{2}O_{5}$ thin films was investigated. Ta$_{2}O_{5}$ thin films were deposited on P-type silicon substrates by plasma-enhanced chemical vapor deposition (PECVD) using tantalum ethylate. Ta(C$_{2}H_{5}O)_{5}$, and nitrous oxide. N$_{2}$O. The microstructure changed from amorphous to polycrystalline above 700.deg. C annealing temperature. The refractive index, dielectric onstant and leakage current of the film increased as annealing temperature increased. However, annealing in oxygen ambient reduced leakage currents and dielectric constant due to the formation of interfacial SiO$_{2}$ layer. By optimizing annealing temperature and ambient, leakage current lower than 10$^{-8}$ A/cm$^{2}$ and maximum capacitance of 9 fF/${\mu}m^{2}$ could be obtained.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2006.08a
• /
• pp.695-698
• /
• 2006

The photosensitive poly-siloxane material used as the passivation layers for the conventional back channel etched (BCE) thin film transistors (TFTs) has been investigated. Through the organic material, the TFT array fabrication process can be reduced and higher aperture ratio can be achieved for higher LCD panel performance. The interface between the organic passivation layer and the back channel of the amorphous active region has been improved by the back channel oxygen treatment and the devices exhibits lower leakage current than the conventional silicon nitride passivation layer of BCE TFTs. The leakage currents between Indium-tin-oxide (ITO) pixels and the TFT devices and its mechanism have also been investigated in this paper.