• Journal of Powder Materials
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• v.16 no.2
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• pp.122-130
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• 2009

Austenitic oxide-dispersion-strengthened (ODS) stainless steel was fabricated using a wet mixing process without a mechanical milling in order to reduce contaminations of impurities during their fabrication process. Solution of yttrium nitrate was dried after a wet mixing with 316L stainless steel powder. Carbon and oxygen contents were effectively reduced by this wet processing. Microstructural analysis showed that coarse yttrium silicates of about 150 nm were formed in austenitic ODS steels with a silicon content of about 0.8 wt%. Wet-processed austenitic ODS steel without silicon showed higher yield strength by the presence of finer oxide of about 20 nm.

• Journal of Powder Materials
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• v.24 no.2
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• pp.87-95
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• 2017

Lithium silicate, a lithium-ion conducting ceramic, is coated on a layer-structured lithium nickel manganese oxide ($LiNi_{0.7}Mn_{0.3}O_2$). Residual lithium compounds ($Li_2CO_3$ and LiOH) on the surface of the cathode material and $SiO_2$ derived from tetraethylorthosilicate are used as lithium and silicon sources, respectively. Powder X-ray diffraction and scanning electron microscopy with energy-dispersive spectroscopy analyses show that lithium silicate is coated uniformly on the cathode particles. Charge and discharge tests of the samples show that the coating can enhance the rate capability and cycle life performance. The improvements are attributed to the reduced interfacial resistance originating from suppression of solid-electrolyte interface (SEI) formation and dissolution of Ni and Mn due to the coating. An X-ray photoelectron spectroscopy study of the cycled electrodes shows that nickel oxide and manganese oxide particles are formed on the surface of the electrode and that greater decomposition of the electrolyte occurs for the bare sample, which confirms the assumption that SEI formation and Ni and Mn dissolution can be reduced using the coating process.

• Journal of Surface Science and Engineering
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• v.53 no.5
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• pp.213-218
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• 2020

Composite material of the graphene ball (GB) inserted graphene oxide (GO) sheet for a supercapacitor electrode was studied. Chemical vapor deposition (CVD) process used to make GBs on the silicon oxide nanoparticles. The GBs mixed into the GO sheets to make GOGB and reduced it to create a reduced GOGB(RGOGB) composite. The RGOGB composite electrode had a large surface area and improved electrochemical properties. Specific capacitance of the RGBGO composite electrode was higher over 20 times than a pure GO and GOGB electrode in cyclic voltammetry(CV) tests, and the Z' and Z" impedance measured by an electrochemical impedance spectrometry(EIS) also low. So, the RGBGO composite electrode would use effectively to expand a performance of supercapacitor.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.1
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• pp.1-5
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• 2001

STI(shallow trench isolation)-CMP(chemical mechanical polishing) process have been substituted for LOCOS(local oxidation of silicon) process to obtain global planarization in the below sub-0.5㎛ technology. However TI-CMP process, especially TI-CMP with RIE(reactive ion etching) etch back process, has some kinds of defect like nitride residue, torn oxide defect, etc. In this paper, we studied how to reduced torn oxide defects after STI-CMP with RIE etch back processed. Although torn oxide defects which can occur on trench area is not deep and not severe, torn oxide defects on moat area is not deep and not severe, torn oxide defects on moat area is sometimes very deep and makes the yield loss. Thus, we did test on pattern wafers which go through trench process, APECVD process, and RIE etch back process by using an IPEC 472 polisher, IC1000/SUVA4 PAD and KOH base slurry to reduce the number of torn defects and to study what is the origin of torn oxide defects.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.1
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• pp.45-51
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• 2004

We have proposed a new shallow trench isolation (STI) process using flowable oxide (F-oxide) chemical vapor deposition (CVD) for DRAM application and it was successfully developed. The combination of F-oxide CVD and HDP CVD is thought to be the superior STI gap-filling process for next generation DRAM fabrication because F-oxide not only improves STI gap-filling capability, but also the reduced local stress by F-oxide in narrow trenches leads to decrease in junction leakage and gate induced drain leakage (GIDL) current. Finally, this process increased data retention time of DRAM compared to HDP STI. However, a serious failure occurred by symphonizing its structural dependency of deposited thickness with poor resistance against HF chemicals. It could be suppressed by reducing the flow time during F-oxide deposition. It was investigated collectively in terms of device yield. In conclusion, the combination of F-oxide and HDP oxide is the very promising technology for STI gap filling process of sub-100nm DRAM technology.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.735-738
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• 2000

This paper shows experimentally that oxide layer on the p-type Si-substrate can grow at low temperature(500$^{\circ}C$∼600$^{\circ}C$) using high pressure water vapor system. As the result of experiment, oxide layer growth rate is about 0.19${\AA}$/min at 500$^{\circ}C$, 0.43${\AA}$/min at 550$^{\circ}C$, 1.2${\AA}$/min at 600$^{\circ}C$ respectively. So, we know oxide layer growth follows reaction-controlled mechanism in given temperature range. Consequently, granting that oxide layer growth rate increases linearly to temperature over 600$^{\circ}C$, we can expect oxide growth rate is 5.2${\AA}$/min at 1000$^{\circ}C$. High pressure oxidation of silicon is particularly attractive for the thick oxidation of power MOSFET, because thermal oxide layers can grow at relatively low temperature in run times comparable to typical high-temperature, 1 atm conditions. For higher-temperature, high-pressure oxidation, the oxidation time is reduced significantly

• Electrical & Electronic Materials
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• v.16 no.9
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• pp.65.1-65
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• 2003

The interface of zirconium oxide thin films on silicon is analyzed in detail for their potential applications in the microelectronics. The formation of an interfacial layer of ZrSi$\sub$x/O$\sub$y. with graded Zr concentration is observed by the x-ray photoelectron spectroscopy and secondary ion mass spectrometry analysis. The as-deposited ZrO$_2$/ZrSi$\sub$x/O$\sub$y//Si sample is thermally stable up to 880$^{\circ}C$, but is less stable compared to the ZrO$_2$/SiO$_2$/Si samples. Post-deposition annealing in oxygen or ammonia improved the thermal stability of as-deposited ZrO$_2$/ZrSi$\sub$x/O$\sub$y/Si to 925$^{\circ}C$, likely due to the oxidation/nitridation of the interface. The as-deposited film had an equivalent oxide thickness of∼13 nm with a dielectric constant of ∼21 and a leakage current of 3.2${\times}$10e-3 A/$\textrm{cm}^2$ at 1.5V. Upon oxygen or ammonia annealing, the formation of SiO$\sub$x/ and SiH$\sub$x/N$\sub$y/O$\sub$z/ at the interface reduced the overall dielectric constants.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.8
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• pp.657-662
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• 2003

This paper presents a new fabrication method of selective SiGe epitaxial growth at 650 $^{\circ}C$ on (100) silicon wafer with oxide patterns by reduced pressure chemical vapor deposition. The new method is characterized by a cyclic process, which is composed of two parts: initially, selective SiGe epitaxy layer is grown on exposed bare silicon during a short incubation time by SiH$_4$/GeH$_4$/HCl/H$_2$system and followed etching step is achieved to remove the SiGe nuclei on oxide by HCl/H$_2$system without source gas flow. As a result, we noted that the addition of HCl serves not only to reduce the growth rate on bare Si, but also to suppress the nucleation on SiO$_2$. In addition, we confirmed that the incubation period is regenerated after etching step, so it is possible to grow thick SiGe epitaxial layer sustaining the selectivity. The effect of the addition of HCl and dopants incorporation was investigated.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.05a
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• pp.142-145
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• 2004

In this work, we have investigated the application of rapid thermal processing (RTP) and plasma enhanced chemical vapour deposition (PECVD) for surface passivation. Rapid thermal oxidation (RTO) has sufficiently low surface recombination velocities (SRV) $S_{eff}$ in spite of a thin oxides and short process time. The effective lifetime is increasing with an increase of the oxide thickness. In the same oxide thickness, The effective lifetime is independent on the process temperature and time. $S_{eff,max}$ is exponentially decreased with increasing oxide thickness. $S_{eff,max}$ can be reduced to 200 cm/s with only 10 nm oxide thickness. On the other hand, three different types of SiN are reviewed. SiN1 layer has a thickness of about 72 nm and a refractive index of 2.8. Also, The SiN1 has a high passivation quality. The effective lifetime and SRV of 1 $\Omega$ cm Float zone (FZ) silicon deposited with SiN1 is about 800 s and under 10 cm/s, respectively. The SiN2 is optimized for the use as an antireflection layer since a refractive index of 2.3. The SiN3 is almost amorphous silicon caused by less contents of N2 from total process. The effective lifetime on the FZ 1 ${\Omega}cm$ is over 1000 ${\mu}s$.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.505-508
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• 2006

Self-heating induced device degradation and its width/length (W/L) dimension dependence were studied in p-type polycrystalline silicon (poly-Si) thin film transistors (TFTs). Negative channel conductance was observed under high power region of output curve, which was mainly caused by hole trapping into gate oxide and also by trap state generation by self-heating effect. Self-heating effect became aggravated as W/L ratio was increased, which was understood by the differences in heat dissipation capability. By reducing applied power density normalized to TFT area, self-heating induced degradation could be reduced.