• Title/Summary/Keyword: Reduce Integration

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Analysis of Performance, Energy-efficiency and Temperature for 3D Multi-core Processors according to Floorplan Methods (플로어플랜 기법에 따른 3차원 멀티코어 프로세서의 성능, 전력효율성, 온도 분석)

  • Choi, Hong-Jun;Son, Dong-Oh;Kim, Jong-Myon;Kim, Cheol-Hong
    • The KIPS Transactions:PartA
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    • v.17A no.6
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    • pp.265-274
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    • 2010
  • As the process technology scales down and integration densities continue to increase, interconnection has become one of the most important factors in performance of recent multi-core processors. Recently, to reduce the delay due to interconnection, 3D architecture has been adopted in designing multi-core processors. In 3D multi-core processors, multiple cores are stacked vertically and each core on different layers are connected by direct vertical TSVs(through-silicon vias). Compared to 2D multi-core architecture, 3D multi-core architecture reduces wire length significantly, leading to decreased interconnection delay and lower power consumption. Despite the benefits mentioned above, 3D design technique cannot be practical without proper solutions for hotspots due to high temperature. In this paper, we propose three floorplan schemes for reducing the peak temperature in 3D multi-core processors. According to our simulation results, the proposed floorplan schemes are expected to mitigate the thermal problems of 3D multi-core processors efficiently, resulting in improved reliability. Moreover, processor performance improves by reducing the performance degradation due to DTM techniques. Power consumption also can be reduced by decreased temperature and reduced execution time.

Determination of the Optimal Aggregation Interval Size of Individual Vehicle Travel Times Collected by DSRC in Interrupted Traffic Flow Section of National Highway (국도 단속류 구간에서 DSRC를 활용하여 수집한 개별차량 통행시간의 최적 수집 간격 결정 연구)

  • PARK, Hyunsuk;KIM, Youngchan
    • Journal of Korean Society of Transportation
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    • v.35 no.1
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    • pp.63-78
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    • 2017
  • The purpose of this study is to determine the optimal aggregation interval to increase the reliability when estimating representative value of individual vehicle travel time collected by DSRC equipment in interrupted traffic flow section in National Highway. For this, we use the bimodal asymmetric distribution data, which is the distribution of the most representative individual vehicle travel time collected in the interrupted traffic flow section, and estimate the MSE(Mean Square Error) according to the variation of the aggregation interval of individual vehicle travel time, and determine the optimal aggregation interval. The estimation equation for the MSE estimation utilizes the maximum estimation error equation of t-distribution that can be used in asymmetric distribution. For the analysis of optimal aggregation interval size, the aggregation interval size of individual vehicle travel time was only 3 minutes or more apart from the aggregation interval size of 1-2 minutes in which the collection of data was normally lost due to the signal stop in the interrupted traffic flow section. The aggregation interval that causes the missing part in the data collection causes another error in the missing data correction process and is excluded. As a result, the optimal aggregation interval for the minimum MSE was 3~5 minutes. Considering both the efficiency of the system operation and the improvement of the reliability of calculation of the travel time, it is effective to operate the basic aggregation interval as 5 minutes as usual and to reduce the aggregation interval to 3 minutes in case of congestion.

Development of District-level Planning Support System by using GIS (GIS를 활용한 상세계획 지원시스템의 개발)

  • 고준환;주용수
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.16 no.2
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    • pp.251-258
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    • 1998
  • The purpose of this study is to develop the District-level Planning Support System (DPSS) by using GIS. The district-level planning which is related for district-level control of city, needs the various parcel-level information which is composing the urban physical environment. The information has to be stored and analyzed for recognizing the study area, then the district-level planning will be efficiently managed. The use of GIS in the process of district-level planning is restricted for the creation of thematic map. GIS is not used for the analysis of spatial patterns and planning process. This study evaluates the characteristics of current district-level planning and the basic components of urban physical environment. And the database model is built. The topology among components is defined by using the spatial relationship. Then the spatial query machine for district-level planing is developed by using ArcView 3.1, Avenue and Dialog Extension. This spatial query machine is applied for case study. This study shows 1) the possibility of the district-level planning support system for analyzing spatial relationship, 2) the needs of the up-to-date topographic map showing current building's footlines and the complete integration with cadastral maps, it will reduce the uncertainty in the spatial decision making process, 3) the methodology for the construction of spatial decision making rules, 4) the further study for the using of raster, network, image and three dimension data.

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Explicit Transient Simulation of SH-waves Using a Spectral Element Method (스펙트럴 요소법을 이용한 SH파 전파의 외연적 시간이력해석)

  • Youn, Seungwook;Kang, Jun Won
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.31 no.2
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    • pp.87-95
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    • 2018
  • This paper introduces a new explicit spectral element method for the simulation of SH-waves in semi-infinite domains. To simulate the wave motion in unbounded domains, it is necessary to reduce the infinite extent to a finite computational domain of interest. To prevent the wave reflection from the trunctated boundaries, perfectly matched layer(PML) wave-absorbing boundary is introduced. The forward problem for simulating SH-waves in PML-truncated domains can be formulated as second-order PDEs. The second-order semi-discrete form of the governing PDEs is constructed by using a mixed spectral elements with Legendre-gauss-Lobatto quadrature method, which results in a diagonalized mass matrix. Then the second-order semi-discrete form is transformed to a first-order, whose solutions are calculated by the fourth-order Runge-Kutta method. Numerical examples showed that solutions of SH-wave in the two-dimensional analysis domain resulted in stable and accurate, and reflections from truncated boundaries could be reduced by using PML boundaries. Elastic wave propagation analysis using explicit time integration method may be apt for solving larger domain problems such as three-dimensional elastic wave problem more efficiently.

Test Time Reduction of BIST by Primary Input Grouping Method (입력신호 그룹화 방법에 의한 BIST의 테스트 시간 감소)

  • Chang, Yoon-Seok;Kim, Dong-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.8
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    • pp.86-96
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    • 2000
  • The representative area among the ones whose cost increases as the integration ratio increases is the test area. As the relative cost of hardware decreases, the BIST method has been focued on as the future-oriented test method. The biggest drawback of it is the increasing test time to obtain the acceptable fault coverage. This paper proposed a BIST implementation method to reduce the test times. This method uses an input grouping and test point insertion method, in which the definition of test point is different from the previous one. That is, the test points are defined on the basis of the internal nodes which are the reference points of the input grouping and are merging points of the grouped signals. The main algorithms in the proposed method were implemented with C-language, and various circuits were used to apply the proposed method for experiment. The results showed that the test time could be reduced to at most $1/2^{40}$ of the pseudo-random pattern case and the fault coverage were also increased compared with the conventional BIST method. The relative hardware overhead of the proposed method to the circuit under test decreases as th e size of the circuit to be tested increases, and the delay overhead by the BIST utility is negligible compared to that of the original circuit. That means, the proposed method can be applied efficiently to large VLSI circuits.

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A Study on Selection Process of Open Source Software (오픈소스 소프트웨어의 선정 절차에 관한 연구)

  • Lee, Young-Min;Rhew, Sung-Yul;Kim, Jong-Bae
    • The KIPS Transactions:PartD
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    • v.15D no.6
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    • pp.793-802
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    • 2008
  • The development methods which utilize OSSs have been tried as new alternative to solve limits of the previous software developments such as the quality of software, and time and cost of developments. Especially, small and medium companies are suffering from difficulty in applying large-scale development methodology whenever they develop softwares. Therefore, in the current situation that demand for small-scale development methodology is increasing, the methods of utilizing OSSs can become an efficient way to save costs and reduce a development period. Accordingly, analysis of open-source is no fixed procedure or method to utilize open-source for software developments in the field. In this thesis, to solve such problems, we propose the procedures and methods for identifying and selecting suitable open-source, and effective methods for improvement and integration through least modification on the basis of synthesis of existing researches and experiences in development projects. For selection of OSSs, we did identify correct requirements for the software to be developed, investigate the open-source just matching with such requirements, draw a candidate index, establish assessment criteria, and the consequently present a method to select OSSs. And, we deduced the validity and improvement of each detailed activity from practical application to an actual project and assessment.

Maximum Power Dissipation Esitimation Model of CMOS digital Gates based on Characteristics of MOSFET (MOSFET 특성에 기초한 CMOS 디지털 게이트의 최대소모전력 예측모델)

  • Kim, Dong-Wook;Jung, Byung-Kweon
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.9
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    • pp.54-65
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    • 1999
  • As the integration ratio and operating speed increase, it has become an important problem to estimate the dissipated power during the design procedure to reduce th TTM(time to market). This paper proposed a prediction model for the maximum dissipated power of a CMOS logic gate. This model uses a calculating method. It was constructed by including the characteristics of MOSFETs, the operational characteristics of the gate, and the characteristics of the input signals. As the construction procedure, a maximum power estimation model for CMOS inverter was formed first, And then, a conversion model to convert a multiple input CMOS gate into a corresponding CMOS inverter was proposed. Finally, the power model for inverter was applied to the converted result so that the model could be applied to a general CMOS gate. We designed several CMOS gates in layout level with $0.6{\mu}m$ design rule to apply both to HSPICE simulation and to the proposed models. The comparison between the two results showed that the gate conversion model and the power estimation model had within 5% and 10% of the relative errors, respectively. Those values show that the proposed models have sufficient accuracies. Also in calculation time, the proposed models were more than 30 times faster than HSPICE simulation. Consequently, it can be said that the proposed model could be used efficiently to estimate the maximum dissipated power of a CMOS logic gate during the design procedure.

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The Effects of Levelers on Electroplating of Thin Copper Foil for FCCL (전기도금법을 이용한 FCCL용 구리박막 제조시 레벨러의 영향 연구)

  • Kang, In-Seok;Koo, Yeon-Soo;Lee, Jae-Ho
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.2
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    • pp.67-72
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    • 2012
  • In recent days, the wire width of IC is narrowed and the degree of integration of IC is increased to obtain the higher capacity of the devices in electronic industry. And then the surface quality of FCCL(Flexible Copper Clad Laminate) became increasingly important. Surface defects on FCCL are bump, scratch, dent and so on. In particular, bumps cause low reliability of the products. Even though there are bumps on the surface, if leveling characteristic of plating solution is good, it does not develop significant bump. In this study, the leveling characteristics of additives are investigated. The objective of study is to improve the leveling characteristic and reduce the surface step through additives and plating conditions. The additives in the electrodeposition bath are critical to obtain flat surface and free of defects. In order to form flat copper surface, accelerator, suppressor and leveler are added to the stock solution. The reason for the addition of leveler is planarization surface and inhibition of the formation of micro-bump. Levelers (SO(Safranin O), MV(Methylene Violet), AB(Alcian Blue), JGB(Janus Green B), DB(Diazine Black) and PVP(Polyvinyl Pyrrolidone) are used in copper plating solution to enhance the morphology of electroplated copper. In this study, the nucleation and growth behavior of copper with variation of additives are studied. The leveling characteristics are analyzed on artificially fabricated Ni bumps.

Nuclear Transfer using Human CD59 and IL-18BP Double Transgenic Fetal Fibroblasts in Miniature Pigs

  • Ryu, Junghyun;Kim, Minjeong;Ahn, Jin Seop;Ahn, Kwang Sung;Shim, Hosup
    • Journal of Embryo Transfer
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    • v.31 no.1
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    • pp.1-7
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    • 2016
  • Xenotransplantation involves multiple steps of immune rejection. The present study was designed to produce nuclear transfer embryos, prior to the production of transgenic pigs, using fibroblasts carrying transgenes human complement regulatory protein hCD59 and interleukin-18 binding protein (hIL-18BP) to reduce hyperacute rejection (HAR) and cellular rejection in pig-to-human xenotransplantation. In addition to the hCD59-mediated reduction of HAR, hIL-18BP may prevent cellular rejection by inhibiting the activation of natural killer cells, activated T-cell proliferation, and induction of $IFN-{\gamma}$. Transgene construct including hCD59 and ILI-18BP was introduced into miniature pig fetal fibroblasts. After antibiotic selection of double transgenic fibroblasts, integration of the transgene was screened by PCR, and the transgene expression was confirmed by RT-PCR. Treatment of human serum did not affect the survival of double-transgenic fibroblasts, whereas the treatment significantly reduced the survival of non-transgenic fibroblasts (p<0.01), suggesting alleviation of HAR. Among 337 reconstituted oocytes produced by nuclear transfer using the double transgenic fibroblasts, 28 (15.3%) developed to the blastocyst stage. Analysis of individual embryos indicated that 53.6% (15/28) of embryos contained the transgene. The result of the present study demonstrates the resistance of hCD59 and IL-18BP double-transgenic fibroblasts against HAR, and the usefulness of the transgenic approach may be predicted by RT-PCR and cytolytic assessment prior to actual production of transgenic pigs. Further study on the transfer of these embryos to surrogates may produce transgenic clone miniature pigs expressing hCD59 and hIL-18BP for xenotransplantation.

Design and Implementation of Picture Archiving and Communication System Component using the RFID for Mobile Web Environments (모바일 웹 환경을 위한 의료영상저장전송시스템 컴포넌트의 설계 및 구현)

  • Kim Chang-Soo;Yim Jae-Hong
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.6
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    • pp.1124-1131
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    • 2006
  • The recent medical treatment guidelines and the development of information technology make hospitals reduce the expense in surrounding environment and it requires improving the quality of medical treatment of the hospital. Moreover, MIS, PACS(Picture Archiving and Communication System), OCS, EMR are also developing. Medical Information System is evolved toward integration of medical IT and situation is changing with increasing high speed in the ICT convergence. Mobile component refers to construct wireless system of hospital which has constructed in existing environment. Through RFID development in existing system, anyone can log on easily to internet whenever and wherever. It is the core technology to implement automatic medical processing system. This paper provides a basic review of RFID model, PACS application component services. In addition, designed and implemented database server's component program and client program of mobile application that recognized RFID tag and patient data in the ubiquitous environments. This system implemented mobile PACS that performed patient data based db environments, and so reduced delay time of requisition, medical treatment, lab.